Datasheet MAX4249, MAX4257 (Maxim) - 4
| Manufacturer | Maxim |
| Description | UCSP, Single-Supply, Low-Noise, Low-Distortion, Rail-to-Rail Op Amps |
| Pages / Page | 16 / 4 — ELECTRICAL CHARACTERISTICS (continued). PARAMETER. SYMBOL. CONDITIONS. … |
| File Format / Size | PDF / 561 Kb |
| Document Language | English |
ELECTRICAL CHARACTERISTICS (continued). PARAMETER. SYMBOL. CONDITIONS. MIN. TYP. MAX. UNITS. Note 2:. Note 3:. Note 4:. Note 5:. Note 6:. Note 7:
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MAX4249–MAX4257 UCSP, Single-Supply, Low-Noise, Low-Distortion, Rail-to-Rail Op Amps
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 5V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL connected to VDD/2, SHDN = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX4250–MAX4254 f = 1kHz 0.0004 AV = 1V/V, VOUT = 2VP-P, RL = 1kΩ to GND (Note 7) f = 20kHz 0.006 Total Harmonic Distortion Plus THD+N % Noise MAX4249/MAX4255/ f = 1kHz 0.0012 MAX4256/MAX4257 AV = 1V/V, VOUT = 2VP-P, RL = 1kΩ to GND (Note 7) f = 20kHz 0.007 Capacitive-Load Stability No sustained oscillations 400 pF MAX4250–MAX4254, AV = 1V/V 10 Gain Margin GM MAX4249/MAX4255/MAX4256/MAX4257, dB 12.5 AV = 10V/V MAX4250–MAX4254, AV = 1V/V 74 Phase Margin ΦM MAX4249/MAX4255/MAX4256/MAX4257, Degrees 68 AV = 10V/V MAX4250–MAX4254 6.7 Settling Time To 0.01%, VOUT MAX4249/MAX4255/ µs = 2V step 1.6 MAX4256/MAX4257 IVDD = 5% of MAX4251/MAX4253 0.8 Delay Time to Shutdown tSH normal µs operation MAX4249/MAX4256 1.2 VOUT = 2.5V, MAX4251/MAX4253 8 Delay Time to Enable tEN VOUT settles to µs 0.1% MAX4249/MAX4256 3.5 Power-Up Delay Time tPU VDD = 0 to 5V step, VOUT stable to 0.1% 6 µs
Note 2:
SHDN is available on the MAX4249/MAX4251/MAX4253/MAX4256 only.
Note 3:
All device specifications are 100% tested at TA = +25°C. Limits over temperature are guaranteed by design.
Note 4:
Guaranteed by the PSRR test.
Note 5:
Offset voltage prior to reflow on the UCSP.
Note 6:
Guaranteed by design.
Note 7:
Lowpass-filter bandwidth is 22kHz for f = 1kHz and 80kHz for f = 20kHz. Noise floor of test equipment = 10nV/!Hz. 4 Maxim Integrated
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 5V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL connected to VDD/2, SHDN = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX4250–MAX4254 f = 1kHz 0.0004 AV = 1V/V, VOUT = 2VP-P, RL = 1kΩ to GND (Note 7) f = 20kHz 0.006 Total Harmonic Distortion Plus THD+N % Noise MAX4249/MAX4255/ f = 1kHz 0.0012 MAX4256/MAX4257 AV = 1V/V, VOUT = 2VP-P, RL = 1kΩ to GND (Note 7) f = 20kHz 0.007 Capacitive-Load Stability No sustained oscillations 400 pF MAX4250–MAX4254, AV = 1V/V 10 Gain Margin GM MAX4249/MAX4255/MAX4256/MAX4257, dB 12.5 AV = 10V/V MAX4250–MAX4254, AV = 1V/V 74 Phase Margin ΦM MAX4249/MAX4255/MAX4256/MAX4257, Degrees 68 AV = 10V/V MAX4250–MAX4254 6.7 Settling Time To 0.01%, VOUT MAX4249/MAX4255/ µs = 2V step 1.6 MAX4256/MAX4257 IVDD = 5% of MAX4251/MAX4253 0.8 Delay Time to Shutdown tSH normal µs operation MAX4249/MAX4256 1.2 VOUT = 2.5V, MAX4251/MAX4253 8 Delay Time to Enable tEN VOUT settles to µs 0.1% MAX4249/MAX4256 3.5 Power-Up Delay Time tPU VDD = 0 to 5V step, VOUT stable to 0.1% 6 µs
Note 2:
SHDN is available on the MAX4249/MAX4251/MAX4253/MAX4256 only.
Note 3:
All device specifications are 100% tested at TA = +25°C. Limits over temperature are guaranteed by design.
Note 4:
Guaranteed by the PSRR test.
Note 5:
Offset voltage prior to reflow on the UCSP.
Note 6:
Guaranteed by design.
Note 7:
Lowpass-filter bandwidth is 22kHz for f = 1kHz and 80kHz for f = 20kHz. Noise floor of test equipment = 10nV/!Hz. 4 Maxim Integrated
