Datasheet PMN50XP (NXP) - 4
| Manufacturer | NXP |
| Description | P-channel TrenchMOS extremely low level FET |
| Pages / Page | 11 / 4 — NXP Semiconductors. PMN50XP. P-channel TrenchMOS extremely low level FET. … |
| File Format / Size | PDF / 153 Kb |
| Document Language | English |
NXP Semiconductors. PMN50XP. P-channel TrenchMOS extremely low level FET. Thermal characteristics. Table 5. Symbol. Parameter
Model Line for this Datasheet
Text Version of Document
link to page 4 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6
NXP Semiconductors PMN50XP P-channel TrenchMOS extremely low level FET 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit
Rth(j-sp) thermal resistance see Figure 4 - - 55 K/W from junction to solder point 03aj69 102 Zth(j-sp) δ (K/W) = 0.5 0.2 10 0.1 t P p 0.05 δ = T 0.02 single pulse tp t T 1 10-4 10-3 10-2 10-1 1 10 102 tp (s)
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics
V(BR)DSS drain-source ID = -250 μA; VGS = 0 V; -20 - - V breakdown voltage Tj = 25 °C ID = -250 μA; VGS = 0 V; -18 - - V Tj = -55 °C VGS(th) gate-source threshold ID = -0.25 mA; VDS = VGS; -0.55 -0.75 -0.95 V voltage Tj = 25 °C; see Figure 5 and 6 ID = -0.25 mA; VDS = VGS; -0.35 - - V Tj = 150 °C; see Figure 5 and 6 ID = -0.25 mA; VDS = VGS; - - -1.1 V Tj = -55 °C; see Figure 5 and 6 IDSS drain leakage current VDS = -20 V; VGS = 0 V; - - -1 μA Tj = 25 °C VDS = -20 V; VGS = 0 V; - - -5 μA Tj = 70 °C PMN50XP_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 2 October 2007 4 of 11
Document Outline 1. Product profile 1.1 General description 1.2 Features 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Package outline 8. Revision history 9. Legal information 9.1 Data sheet status 9.2 Definitions 9.3 Disclaimers 9.4 Trademarks 10. Contact information 11. Contents
NXP Semiconductors PMN50XP P-channel TrenchMOS extremely low level FET 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit
Rth(j-sp) thermal resistance see Figure 4 - - 55 K/W from junction to solder point 03aj69 102 Zth(j-sp) δ (K/W) = 0.5 0.2 10 0.1 t P p 0.05 δ = T 0.02 single pulse tp t T 1 10-4 10-3 10-2 10-1 1 10 102 tp (s)
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics
V(BR)DSS drain-source ID = -250 μA; VGS = 0 V; -20 - - V breakdown voltage Tj = 25 °C ID = -250 μA; VGS = 0 V; -18 - - V Tj = -55 °C VGS(th) gate-source threshold ID = -0.25 mA; VDS = VGS; -0.55 -0.75 -0.95 V voltage Tj = 25 °C; see Figure 5 and 6 ID = -0.25 mA; VDS = VGS; -0.35 - - V Tj = 150 °C; see Figure 5 and 6 ID = -0.25 mA; VDS = VGS; - - -1.1 V Tj = -55 °C; see Figure 5 and 6 IDSS drain leakage current VDS = -20 V; VGS = 0 V; - - -1 μA Tj = 25 °C VDS = -20 V; VGS = 0 V; - - -5 μA Tj = 70 °C PMN50XP_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 2 October 2007 4 of 11
Document Outline 1. Product profile 1.1 General description 1.2 Features 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Package outline 8. Revision history 9. Legal information 9.1 Data sheet status 9.2 Definitions 9.3 Disclaimers 9.4 Trademarks 10. Contact information 11. Contents
