Datasheet GD32E503xx (GigaDevice) - 5

ManufacturerGigaDevice
DescriptionArm Cortex-M33 32-bit MCU
Pages / Page98 / 5 — List of Figures. Figure 2-1. GD32E503xx block diagram .. 9. Figure 2-2. …
File Format / SizePDF / 2.9 Mb
Document LanguageEnglish

List of Figures. Figure 2-1. GD32E503xx block diagram .. 9. Figure 2-2. GD32E503Zx LQFP144 pinouts ... 10

List of Figures Figure 2-1 GD32E503xx block diagram . 9 Figure 2-2 GD32E503Zx LQFP144 pinouts .. 10

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link to page 10 link to page 11 link to page 12 link to page 13 link to page 13 link to page 18 link to page 56 link to page 63 link to page 63 link to page 74 link to page 75 link to page 82 link to page 92 link to page 93 link to page 94 link to page 95 GD32E503xx Datasheet
List of Figures Figure 2-1. GD32E503xx block diagram .. 9 Figure 2-2. GD32E503Zx LQFP144 pinouts ... 10 Figure 2-3. GD32E503Vx LQFP100 pinouts ... 11 Figure 2-4. GD32E503Rx LQFP64 pinouts .. 12 Figure 2-5. GD32E503Cx LQFP48 pinouts .. 12 Figure 2-6. GD32E503xx clock tree .. 17 Figure 4-1. Recommended power supply decoupling capacitors (1)(2) ... 55 Figure 4-2. Typical supply current consumption in Run mode .. 62 Figure 4-3. Typical supply current consumption in Sleep mode .. 62 Figure 4-4. Recommended external NRST pin circuit.. 73 Figure 4-5. I/O port AC characteristics definition ... 74 Figure 4-6. USBD timings: definition of data signal rise and fall time ... 81 Figure 5-1. LQFP144 package outline ... 91 Figure 5-2. LQFP100 package outline ... 92 Figure 5-3. LQFP64 package outline ... 93 Figure 5-4. LQFP48 package outline ... 94
4 Document Outline Table of Contents List of Figures List of Tables 1. General description 2. Device overview 2.1. Device information 2.2. Block diagram 2.3. Pinouts and pin assignment 2.4. Memory map 2.5. Clock tree 2.6. Pin definitions 2.6.1. GD32E503Zx LQFP144 pin definitions 2.6.2. GD32E503Vx LQFP100 pin definitions 2.6.3. GD32E503Rx LQFP64 pin definitions 2.6.4. GD32E503Cx LQFP48 pin definitions 3. Functional description 3.1. Arm® Cortex®-M33 core 3.2. Embedded memory 3.3. Clock, reset and supply management 3.4. Boot modes 3.5. Power saving modes 3.6. Analog to digital converter (ADC) 3.7. Digital to analog converter (DAC) 3.8. DMA 3.9. General-purpose inputs/outputs (GPIOs) 3.10. Timers and PWM generation 3.11. Real time clock (RTC) 3.12. Inter-integrated circuit (I2C) 3.13. Serial peripheral interface (SPI) 3.14. Universal synchronous asynchronous receiver transmitter (USART) 3.15. Inter-IC sound (I2S) 3.16. Universal Serial Bus full-speed device interface (USBD) 3.17. Controller area network (CAN) 3.18. External memory controller (EXMC) 3.19. Secure digital input/output interface (SDIO) 3.20. Super High-Resolution Timer (SHRTIMER) 3.21. Serial/Quad Parallel Interface (SQPI) 3.22. Debug mode 3.23. Package and operation temperature 4. Electrical characteristics 4.1. Absolute maximum ratings 4.2. Operating conditions characteristics 4.3. Power consumption 4.4. EMC characteristics 4.5. Power supply supervisor characteristics 4.6. Electrical sensitivity 4.7. External clock characteristics 4.8. Internal clock characteristics 4.9. PLL characteristics 4.10. Memory characteristics 4.11. NRST pin characteristics 4.12. GPIO characteristics 4.13. Temperature sensor characteristics 4.14. ADC characteristics 4.15. DAC characteristics 4.16. I2C characteristics 4.17. SPI characteristics 4.18. I2S characteristics 4.19. USART characteristics 4.20. CAN characteristics 4.21. USBD characteristics 4.22. SDIO characteristics 4.23. EXMC characteristics 4.24. Serial/Quad Parallel Interface (SQPI) characteristics 4.25. Super High-Resolution Timer (SHRTIMER) characteristics 4.26. TIMER characteristics 4.27. WDGT characteristics 4.28. Parameter condition 5. Package information 5.1. LQFP144 package outline dimensions 5.2. LQFP100 package outline dimensions 5.3. LQFP64 package outline dimensions 5.4. LQFP48 package outline dimensions 6. Ordering information 7. Revision history