Datasheet MAX20343, MAX20344 (Maxim) - 32
| Manufacturer | Maxim |
| Description | Ultra-Low Quiescent Current, Low Noise 3.5W Buck-Boost Regulator |
| Pages / Page | 43 / 32 — BITFIELD. BITS. DESCRIPTION. Status (0x05). BIT. Field. Reset. Access. … |
| File Format / Size | PDF / 1.7 Mb |
| Document Language | English |
BITFIELD. BITS. DESCRIPTION. Status (0x05). BIT. Field. Reset. Access. Type. Int (0x06)
Model Line for this Datasheet
Text Version of Document
link to page 28 link to page 28 MAX20343/MAX20344 Ultra-Low Quiescent Current, Low Noise 3.5W Buck-Boost Regulator
BITFIELD BITS DESCRIPTION
Force Switch-Over Controls how the device powers the internal circuitry. SwoFrcIN 5 0 = Switch-over supply forced to VOUT when VOUT > VOUT_UVLO_R. 1 = Switch-over supply forced to VIN. Buck-Boost Integrator Enable The Integrator can be disabled to improve settling time on load transients at the cost of load regulation error. Latched internally, it can only be changed BBstIntegEn 2 when BBstEn = 0. 0 = Integrator disabled 1 = Integrator enabled Adaptive Peak/Valley Current Adjustment Disable 0 = Enabled 1 = Disabled, peak current fixed to the values set by BBstIPSet1 and BBstIPAdptDis 1 BBstIPSet2. Valley current is fixed to 0mA. This setting is equivalent to forcing discontinuous conduction mode and greatly diminishes the output power capability of the part. Generally this is not a recommended setting. FET Scale Reduces FET sizes by a factor of 2. This setting can be used to optimize efficiency for lighter loads if it is acceptable to support lower maximum output power. If BBstFETScale = 0, the part requires a 1μH inductor and at least twice the BBstFETScale 0 derated capacitance in Figure 9. If BBstFETScale = 1, the part requires a 2.2μH inductor and at least the derated capacitance in Figure 9. Latched internally, it can only be changed when BBstEn = 0. 0 = FET scaling disabled 1 = FET scaling enabled
Status (0x05) BIT 7 6 5 4 3 2 1 0 Field
– – – – – – OutGood InUVLO
Reset
– – – – – –
Access
– – – – – – Read Only Read Only
Type BITFIELD BITS DESCRIPTION
Status of Output Voltage OutGood 1 0 = Output has not reached full power capability 1 = Output voltage is high enough to support full power capability Status register showing whether input voltage is low enough to enable parallel input NMOS. InUVLO 0 0 = VIN high enough for full power operation 1 = Power may be limited due to low VIN
Int (0x06) BIT 7 6 5 4 3 2 1 0 Field
– – – – – – OutGoodInt InUVLOInt
Reset
– – – – – –
Access
– – – – – – Read Only Read Only
Type
www.maximintegrated.com Maxim Integrated | 32 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 16-BUMP WLP 12-Pin FC2QFN Electrical Characteristics Electrical Characteristics (continued) Typical Operating Characteristics Typical Operating Characteristics (continued) Pin Configurations I2C-Controlled WLP Single-Pin-Enabled WLP I2C-Controlled FC2QFN Single-Pin-Enabled FC2QFN Pin Description Pin Description (continued) Functional Diagram Functional Diagram Detailed Description Startup Voltage Architectural Description Switching Phases Buck-Boost Mode Buck-Only Mode Inductor Peak and Valley Current Limits Integrator Control Loop Disable Input Operating Voltage Output Operating Power and Other Optimizations Device Control I2C-Controlled Single-Pin-Enabled Dynamic Voltage Scaling (DVS) RSEL Voltage Setting Register Map MAX20343/MAX20344 Register Details ChipID (0x00) BBstCfg0 (0x01) BBstVSet (0x02) BBstISet (0x03) BBstCfg1 (0x04) Status (0x05) Int (0x06) Mask (0x07) LockMsk (0x50) LockUnlock (0x51) Applications Information Input and Output Capacitance Inductor Selection Soft-Start I2C Interface Slave Address Start, Stop, and Repeated Start Conditions Bit Transfer Single-Byte Write Burst Write Single Byte Read Burst Read Acknowledge Bits Register Values Typical Application Circuits Optical Heart Rate LED Supply LPWAN Radio Supply Ordering Information Revision History
BITFIELD BITS DESCRIPTION
Force Switch-Over Controls how the device powers the internal circuitry. SwoFrcIN 5 0 = Switch-over supply forced to VOUT when VOUT > VOUT_UVLO_R. 1 = Switch-over supply forced to VIN. Buck-Boost Integrator Enable The Integrator can be disabled to improve settling time on load transients at the cost of load regulation error. Latched internally, it can only be changed BBstIntegEn 2 when BBstEn = 0. 0 = Integrator disabled 1 = Integrator enabled Adaptive Peak/Valley Current Adjustment Disable 0 = Enabled 1 = Disabled, peak current fixed to the values set by BBstIPSet1 and BBstIPAdptDis 1 BBstIPSet2. Valley current is fixed to 0mA. This setting is equivalent to forcing discontinuous conduction mode and greatly diminishes the output power capability of the part. Generally this is not a recommended setting. FET Scale Reduces FET sizes by a factor of 2. This setting can be used to optimize efficiency for lighter loads if it is acceptable to support lower maximum output power. If BBstFETScale = 0, the part requires a 1μH inductor and at least twice the BBstFETScale 0 derated capacitance in Figure 9. If BBstFETScale = 1, the part requires a 2.2μH inductor and at least the derated capacitance in Figure 9. Latched internally, it can only be changed when BBstEn = 0. 0 = FET scaling disabled 1 = FET scaling enabled
Status (0x05) BIT 7 6 5 4 3 2 1 0 Field
– – – – – – OutGood InUVLO
Reset
– – – – – –
Access
– – – – – – Read Only Read Only
Type BITFIELD BITS DESCRIPTION
Status of Output Voltage OutGood 1 0 = Output has not reached full power capability 1 = Output voltage is high enough to support full power capability Status register showing whether input voltage is low enough to enable parallel input NMOS. InUVLO 0 0 = VIN high enough for full power operation 1 = Power may be limited due to low VIN
Int (0x06) BIT 7 6 5 4 3 2 1 0 Field
– – – – – – OutGoodInt InUVLOInt
Reset
– – – – – –
Access
– – – – – – Read Only Read Only
Type
www.maximintegrated.com Maxim Integrated | 32 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 16-BUMP WLP 12-Pin FC2QFN Electrical Characteristics Electrical Characteristics (continued) Typical Operating Characteristics Typical Operating Characteristics (continued) Pin Configurations I2C-Controlled WLP Single-Pin-Enabled WLP I2C-Controlled FC2QFN Single-Pin-Enabled FC2QFN Pin Description Pin Description (continued) Functional Diagram Functional Diagram Detailed Description Startup Voltage Architectural Description Switching Phases Buck-Boost Mode Buck-Only Mode Inductor Peak and Valley Current Limits Integrator Control Loop Disable Input Operating Voltage Output Operating Power and Other Optimizations Device Control I2C-Controlled Single-Pin-Enabled Dynamic Voltage Scaling (DVS) RSEL Voltage Setting Register Map MAX20343/MAX20344 Register Details ChipID (0x00) BBstCfg0 (0x01) BBstVSet (0x02) BBstISet (0x03) BBstCfg1 (0x04) Status (0x05) Int (0x06) Mask (0x07) LockMsk (0x50) LockUnlock (0x51) Applications Information Input and Output Capacitance Inductor Selection Soft-Start I2C Interface Slave Address Start, Stop, and Repeated Start Conditions Bit Transfer Single-Byte Write Burst Write Single Byte Read Burst Read Acknowledge Bits Register Values Typical Application Circuits Optical Heart Rate LED Supply LPWAN Radio Supply Ordering Information Revision History
