Datasheet MAX20343, MAX20344 (Maxim) - 7
| Manufacturer | Maxim |
| Description | Ultra-Low Quiescent Current, Low Noise 3.5W Buck-Boost Regulator |
| Pages / Page | 43 / 7 — Absolute Maximum Ratings. Package Information. 16-BUMP WLP. THERMAL … |
| File Format / Size | PDF / 1.7 Mb |
| Document Language | English |
Absolute Maximum Ratings. Package Information. 16-BUMP WLP. THERMAL RESISTANCE, SINGLE-LAYER BOARD
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MAX20343/MAX20344 Ultra-Low Quiescent Current, Low Noise 3.5W Buck-Boost Regulator
Absolute Maximum Ratings
IN, OUT, SDA, SCL, EN, FAST, RSEL, FC2QFN) (derate 17.04mW/°C above +70°C) ...1363.20mW PGOOD, INGOOD, INT, CAP .. -0.3V to +6.0V Operating Temperature Range LVLX ...-0.3V to VIN + 0.3V MAX20343 ...-40°C to +85°C HVLX ... -0.3 to min(VOUT + 0.3V, +6.0V) MAX20344 ...-40°C to +125°C Continuous Power Dissipation (Multilayer Board, Junction Temperature ... +150°C TA = +70°C) (4 x 4 Array 16-Ball, 1.77mm x 2.01mm, 0.4mm .. Storage Temperature Range ..-40°C to +150°C Pitch WLP) (derate 17.26mW/°C above +70°C) .. 1380.80mW Soldering Temperature (reflow) ..+260°C Continuous Power Dissipation (Multilayer Board, TA = +70°C) (12-Pin, 2.50mm x 2.50mm, 0.5mm Pitch ... Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information 16-BUMP WLP
Package Code W161C2+1 Outline Number 21-100328 Land Pattern Number Refer to Application Note 1891
THERMAL RESISTANCE, SINGLE-LAYER BOARD
Junction-to-Ambient (θJA) Junction-to-Case Thermal Resistance (θJC)
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction-to-Ambient (θJA) 57.93°C/W
12-Pin FC2QFN
Package Code F122B2F+1 Outline Number 21-100331 Land Pattern Number 90-100130
THERMAL RESISTANCE, SINGLE-LAYER BOARD
Junction-to-Ambient (θJA) Junction-to-Case Thermal Resistance (θJC)
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction-to-Ambient (θJA) 58.70°C/W Junction-to-Case Thermal Resistance (θJC) 23.10°C/W For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/ thermal-tutorial. www.maximintegrated.com Maxim Integrated | 7 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 16-BUMP WLP 12-Pin FC2QFN Electrical Characteristics Electrical Characteristics (continued) Typical Operating Characteristics Typical Operating Characteristics (continued) Pin Configurations I2C-Controlled WLP Single-Pin-Enabled WLP I2C-Controlled FC2QFN Single-Pin-Enabled FC2QFN Pin Description Pin Description (continued) Functional Diagram Functional Diagram Detailed Description Startup Voltage Architectural Description Switching Phases Buck-Boost Mode Buck-Only Mode Inductor Peak and Valley Current Limits Integrator Control Loop Disable Input Operating Voltage Output Operating Power and Other Optimizations Device Control I2C-Controlled Single-Pin-Enabled Dynamic Voltage Scaling (DVS) RSEL Voltage Setting Register Map MAX20343/MAX20344 Register Details ChipID (0x00) BBstCfg0 (0x01) BBstVSet (0x02) BBstISet (0x03) BBstCfg1 (0x04) Status (0x05) Int (0x06) Mask (0x07) LockMsk (0x50) LockUnlock (0x51) Applications Information Input and Output Capacitance Inductor Selection Soft-Start I2C Interface Slave Address Start, Stop, and Repeated Start Conditions Bit Transfer Single-Byte Write Burst Write Single Byte Read Burst Read Acknowledge Bits Register Values Typical Application Circuits Optical Heart Rate LED Supply LPWAN Radio Supply Ordering Information Revision History
Absolute Maximum Ratings
IN, OUT, SDA, SCL, EN, FAST, RSEL, FC2QFN) (derate 17.04mW/°C above +70°C) ...1363.20mW PGOOD, INGOOD, INT, CAP .. -0.3V to +6.0V Operating Temperature Range LVLX ...-0.3V to VIN + 0.3V MAX20343 ...-40°C to +85°C HVLX ... -0.3 to min(VOUT + 0.3V, +6.0V) MAX20344 ...-40°C to +125°C Continuous Power Dissipation (Multilayer Board, Junction Temperature ... +150°C TA = +70°C) (4 x 4 Array 16-Ball, 1.77mm x 2.01mm, 0.4mm .. Storage Temperature Range ..-40°C to +150°C Pitch WLP) (derate 17.26mW/°C above +70°C) .. 1380.80mW Soldering Temperature (reflow) ..+260°C Continuous Power Dissipation (Multilayer Board, TA = +70°C) (12-Pin, 2.50mm x 2.50mm, 0.5mm Pitch ... Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information 16-BUMP WLP
Package Code W161C2+1 Outline Number 21-100328 Land Pattern Number Refer to Application Note 1891
THERMAL RESISTANCE, SINGLE-LAYER BOARD
Junction-to-Ambient (θJA) Junction-to-Case Thermal Resistance (θJC)
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction-to-Ambient (θJA) 57.93°C/W
12-Pin FC2QFN
Package Code F122B2F+1 Outline Number 21-100331 Land Pattern Number 90-100130
THERMAL RESISTANCE, SINGLE-LAYER BOARD
Junction-to-Ambient (θJA) Junction-to-Case Thermal Resistance (θJC)
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction-to-Ambient (θJA) 58.70°C/W Junction-to-Case Thermal Resistance (θJC) 23.10°C/W For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/ thermal-tutorial. www.maximintegrated.com Maxim Integrated | 7 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 16-BUMP WLP 12-Pin FC2QFN Electrical Characteristics Electrical Characteristics (continued) Typical Operating Characteristics Typical Operating Characteristics (continued) Pin Configurations I2C-Controlled WLP Single-Pin-Enabled WLP I2C-Controlled FC2QFN Single-Pin-Enabled FC2QFN Pin Description Pin Description (continued) Functional Diagram Functional Diagram Detailed Description Startup Voltage Architectural Description Switching Phases Buck-Boost Mode Buck-Only Mode Inductor Peak and Valley Current Limits Integrator Control Loop Disable Input Operating Voltage Output Operating Power and Other Optimizations Device Control I2C-Controlled Single-Pin-Enabled Dynamic Voltage Scaling (DVS) RSEL Voltage Setting Register Map MAX20343/MAX20344 Register Details ChipID (0x00) BBstCfg0 (0x01) BBstVSet (0x02) BBstISet (0x03) BBstCfg1 (0x04) Status (0x05) Int (0x06) Mask (0x07) LockMsk (0x50) LockUnlock (0x51) Applications Information Input and Output Capacitance Inductor Selection Soft-Start I2C Interface Slave Address Start, Stop, and Repeated Start Conditions Bit Transfer Single-Byte Write Burst Write Single Byte Read Burst Read Acknowledge Bits Register Values Typical Application Circuits Optical Heart Rate LED Supply LPWAN Radio Supply Ordering Information Revision History
