Datasheet AD8555 (Analog Devices)

Zero-Drift, Digital y Programmable Sensor Signal Amplifier Data Sheet AD8555 FEATURES FUNCTIONAL BLOCK DIAGRAM Very low offset voltage: 10 µV maximum over temperature VDD Very low input offset voltage drift: 60 nV/°C maximum VCLAMP VDD High CMRR: 96 dB minimum A5 VNEG P3 Digitally programmable gain and output offset voltage R4 R6 A1 Single-wire serial interface VSS R1 Open and short wire fault detection VDD VSS VDD P1 Low-pass filtering RF Stable with any capacitive load R3 A3 VOUT A4 Externally programmable output clamp voltage for driving P2 VDD low voltage ADCs VSS FILT/ R2 DIGOUT VSS LFCSP-16 and SOIC-8 packages R5 R7 A2 2.7 V to 5.5 V operation VPOS VDD P4 −40°C to +125°C operation VSS APPLICATIONS DAC Pressure and position sensors Thermocouple amplifiers VSS
04598-0-001
Industrial weigh scales
Figure 1.
Precision current sensing Strain gages GENERAL DESCRIPTION
The AD8555 is a zero-drift, sensor signal amplifier with In addition to extremely low input offset voltage and input digitally programmable gain and output offset. Designed to offset voltage drift and very high dc and ac CMRR, the AD8555 easily and accurately convert variable pressure sensor and strain also includes a pull-up current source at the input pins and a bridge outputs to a wel -defined output voltage range, the pull-down current source at the VCLAMP pin. This allows AD8555 also accurately amplifies many other differential or open wire and shorted wire fault detection. A low-pass filter single-ended sensor outputs. The AD8555 uses the ADI function is implemented via a single low cost external capacitor. patented low noise auto-zero and DigiTrim® technologies to Output clamping set via an external reference voltage al ows the create an incredibly accurate and flexible signal processing AD8555 to drive lower voltage ADCs safely and accurately. solution in a very compact footprint. When used in conjunction with an ADC referenced to the same Gain is digitally programmable in a wide range from 70 to 1,280 supply, the system accuracy becomes immune to normal supply through a serial data interface. Gain adjustment can be ful y voltage variations. Output offset voltage can be adjusted with a simulated in-circuit and then permanently programmed with resolution of better than 0.4% of the difference between VDD proven and reliable poly-fuse technology. Output offset voltage and VSS. A lockout trim after gain and offset adjustment is also digitally programmable and is ratiometric to the supply further ensures field reliability. voltage. The AD8555 is ful y specified over the extended industrial temperature range of −40°C to +125°C. Operating from single- supply voltages of 2.7 V to 5.5 V, the AD8555 is offered in the narrow 8-lead SOIC package and the 4 mm × 4 mm 16-lead LFCSP.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN VALUES OPEN WIRE FAULT DETECTION SHORTED WIRE FAULT DETECTION FLOATING VPOS, VNEG, OR VCLAMP FAULT DETECTION DEVICE PROGRAMMING Digital Interface Initial State Simulation Mode Programming Mode Parity Error Detection Read Mode Sense Current Suggested Programming Procedure Suggested Algorithm to Determine Optimal Gain and Offset Codes FILTERING FUNCTION DRIVING CAPACITIVE LOADS RF INTERFERENCE SINGLE-SUPPLY DATA ACQUISITION SYSTEM USING THE AD8555 WITH CAPACITIVE SENSORS OUTLINE DIMENSIONS ORDERING GUIDE