Datasheet NC7SV57, NC7SV58 (ON Semiconductor) - 2
| Manufacturer | ON Semiconductor |
| Description | TinyLogic ULP-A Universal Configurable 2-Input Logic Gates |
| Pages / Page | 13 / 2 — NC7SV57, NC7SV58. FUNCTION TABLE. Inputs. NC7SV57. NC7SV58. Y = (I0). … |
| Revision | 3 |
| File Format / Size | PDF / 380 Kb |
| Document Language | English |
NC7SV57, NC7SV58. FUNCTION TABLE. Inputs. NC7SV57. NC7SV58. Y = (I0). (I2) + (I1). (I2). FUNCTION SELECTION TABLE. 2−Input Logic Function
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NC7SV57, NC7SV58 FUNCTION TABLE Inputs NC7SV57 NC7SV58 I2 I1 I0 Y = (I0)
w
(I2) + (I1)
w
(I2) Y = (I0)
w
(I2) + (I1)
w
(I2)
L L L H L L L H L H L H L H L L H H L H H L L L H H L H L H H H L H L H H H H L
FUNCTION SELECTION TABLE 2−Input Logic Function Device Selection Connection Configuration
2−Input AND NC7SV57 Figure 2 2−Input AND with inverted input NC7SV58 Figure 8, 9 2−Input AND with both inputs inverted NC7SV57 Figure 5 2−Input NAND NC7SV58 Figure 7 2−Input NAND with inverted input NC7SV57 Figure 3, 4 2−Input NAND with both inputs inverted NC7SV58 Figure 10 2−Input OR NC7SV58 Figure 10 2−Input OR with inverted input NC7SV57 Figure 3, 4 2−Input OR with both inputs inverted NC7SV58 Figure 7 2−Input NOR NC7SV57 Figure 5 2−Input NOR with inverted input NC7SV58 Figure 8, 9 2−Input NOR with both inputs inverted NC7SV57 Figure 2 2−Input XOR NC7SV58 Figure 11 2−Input XNOR NC7SV57 Figure 6
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NC7SV57, NC7SV58 FUNCTION TABLE Inputs NC7SV57 NC7SV58 I2 I1 I0 Y = (I0)
w
(I2) + (I1)
w
(I2) Y = (I0)
w
(I2) + (I1)
w
(I2)
L L L H L L L H L H L H L H L L H H L H H L L L H H L H L H H H L H L H H H H L
FUNCTION SELECTION TABLE 2−Input Logic Function Device Selection Connection Configuration
2−Input AND NC7SV57 Figure 2 2−Input AND with inverted input NC7SV58 Figure 8, 9 2−Input AND with both inputs inverted NC7SV57 Figure 5 2−Input NAND NC7SV58 Figure 7 2−Input NAND with inverted input NC7SV57 Figure 3, 4 2−Input NAND with both inputs inverted NC7SV58 Figure 10 2−Input OR NC7SV58 Figure 10 2−Input OR with inverted input NC7SV57 Figure 3, 4 2−Input OR with both inputs inverted NC7SV58 Figure 7 2−Input NOR NC7SV57 Figure 5 2−Input NOR with inverted input NC7SV58 Figure 8, 9 2−Input NOR with both inputs inverted NC7SV57 Figure 2 2−Input XOR NC7SV58 Figure 11 2−Input XNOR NC7SV57 Figure 6
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