ADGS1612Data SheetParameter25°C−40°C to +85°C−40°C to +125°CUnitTest Conditions/Comments POWER REQUIREMENTS VDD = 3.3 V Positive Supply Current, IDD 0.01 μA typ All switches open 1 μA max 0.01 μA typ All switches closed, VL = 3.3 V 1 μA max Digital Supply Current, IL Inactive 3.2 μA typ Digital inputs = 0 V or VL 4.8 μA max Inactive, SCLK = 1 MHz 7 μA typ CSE = VL and SDI = 0 V or VL, VL = 3 V SCLK = 50 MHz 210 μA typ CSE = VL and SDI = 0 V or VL, VL = 3 V Inactive, SDI = 1 MHz 7.5 μA typ CSE and SCLK = 0 V or VL, VL = 3 V SDI = 25 MHz 120 μA typ CSE and SCLK = 0 V or VL, VL = 3 V Active at 50 MHz 0.7 mA typ Digital inputs toggle between 0 V and VL, VL = 2.7 V 1.0 mA max VDD 3.3 V min GND = 0 V, VSS = 0 V 16 V max GND = 0 V, VSS = 0 V Rev. 0 | Page 10 of 29 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications ±5 V Dual Supply 12 V Single Supply 5 V Single Supply 3.3 V Single Supply Continuous Current per Channel, Sx or Dx Timing Characteristics Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Theory of Operation Address Mode Error Detection Features Cyclic Redundancy Check (CRC) Error Detection SCLK Count Error Detection Invalid Read/Write Address Error Clearing the Error Flags Register Burst Mode Software Reset Daisy-Chain Mode Power-On Reset Applications Information Break-Before-Make Switching Digital Input Buffers Power Supply Rails Register Summary Register Details Switch Data Register Address: 0x01, Reset: 0x00, Name: SW_DATA Error Configuration Register Address: 0x02, Reset: 0x06, Name: ERR_CONFIG Error Flags Register Address: 0x03, Reset: 0x00, Name: ERR_FLAGS Burst Enable Register Address: 0x05, Reset: 0x00, Name: BURST_EN Software Reset Register Address: 0x0B, Reset: 0x00, Name: SOFT_RESETB Outline Dimensions Ordering Guide