Datasheet ADGS5412 (Analog Devices) - 3

ManufacturerAnalog Devices
DescriptionSPI Interface, 4× SPST Switches, 9.8 Ω RON, ±20 V/+36 V, Mux Configurable
Pages / Page30 / 3 — Data Sheet. ADGS5412. SPECIFICATIONS ±15 V DUAL SUPPLY. Table 1. …
RevisionA
File Format / SizePDF / 616 Kb
Document LanguageEnglish

Data Sheet. ADGS5412. SPECIFICATIONS ±15 V DUAL SUPPLY. Table 1. Parameter. +25°C −40°C to +85°C −40°C to +125°C Unit

Data Sheet ADGS5412 SPECIFICATIONS ±15 V DUAL SUPPLY Table 1 Parameter +25°C −40°C to +85°C −40°C to +125°C Unit

Model Line for this Datasheet

Text Version of Document

link to page 19 link to page 19 link to page 19 link to page 19 link to page 20 link to page 20 link to page 20 link to page 4
Data Sheet ADGS5412 SPECIFICATIONS ±15 V DUAL SUPPLY
Positive supply (VDD) = 15 V ± 10%, negative supply (VSS) = −15 V ± 10%, digital supply (VL) = 2.7 V to 5.5 V, GND = 0 V, unless otherwise noted.
Table 1. Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VDD to VSS V On Resistance, RON 9.8 Ω typ VS = ±10 V, IS = −10 mA; see Figure 29 11 14 16 Ω max VDD = +13.5 V, VSS = −13.5 V On-Resistance Match Between Channels, 0.35 Ω typ VS = ±10 V, IS = −10 mA ∆RON 0.7 0.9 1.1 Ω max On-Resistance Flatness, RFLAT (ON) 1.2 Ω typ VS = ±10 V, IS = −10 mA 1.6 2 2.2 Ω max LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V Source Off Leakage, IS (Off) ±0.05 nA typ VS = ±10 V, VD = μ 10 V; see Figure 32 ±0.25 ±0.75 ±6 nA max Drain Off Leakage, ID (Off) ±0.05 nA typ VS = ±10 V, VD = μ 10 V; see Figure 32 ±0.25 ±0.75 ±6 nA max Channel On Leakage, ID (On), IS (On) ±0.1 nA typ VS = VD = ±10 V; see Figure 28 ±0.4 ±2 ±12 nA max DIGITAL OUTPUT Output Voltage Low, VOL 0.4 V max ISINK = 5 mA 0.2 V max ISINK = 1 mA High Impedance Leakage Current 0.001 µA typ VOUT = VGND or VL ±0.1 µA max High Impedance Output Capacitance 4 pF typ DIGITAL INPUTS Input Voltage High, VINH 2 V min 3.3 V < VL ≤ 5.5 V 1.35 V min 2.7 V ≤ VL ≤ 3.3 V Low, VINL 0.8 V max 3.3 V < VL ≤ 5.5 V 0.8 V max 2.7 V ≤ VL ≤ 3.3 V Input Current, IINL or IINH 0.002 µA typ VIN = VGND or VL ±0.1 µA max Digital Input Capacitance, CIN 4 pF typ DYNAMIC CHARACTERISTICS1 tON 460 ns typ RL = 300 Ω, CL = 35 pF 540 560 580 ns max VS = 10 V; see Figure 36 tOFF 185 ns typ RL = 300 Ω, CL = 35 pF 225 240 270 ns max VS = 10 V; see Figure 36 Break-Before-Make Time Delay, tD 245 ns typ RL = 300 Ω, CL = 35 pF 195 ns min VS1 = VS2 = 10 V, see Figure 35 Rev. A | Page 3 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY ±20 V DUAL SUPPLY 12 V SINGLE SUPPLY 36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, SX OR DX TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION ADDRESS MODE ERROR DETECTION FEATURES Cyclic Redundancy Check (CRC) Error Detection SCLK Count Error Detection Invalid Read/Write Address Error CLEARING THE ERROR FLAGS REGISTER BURST MODE SOFTWARE RESET DAISY-CHAIN MODE POWER-ON RESET BREAK-BEFORE-MAKE SWITCHING TRENCH ISOLATION DIGITAL INPUT BUFFERS APPLICATIONS INFORMATION POWER SUPPLY RAILS POWER SUPPLY RECOMMENDATIONS REGISTER SUMMARY REGISTER DETAILS SWITCH DATA REGISTER Address: 0x01, Reset: 0x00, Name: SW_DATA ERROR CONFIGURATION REGISTER Address: 0x02, Reset: 0x06, Name: ERR_CONFIG ERROR FLAGS REGISTER Address: 0x03, Reset: 0x00, Name: ERR_FLAGS BURST ENABLE REGISTER Address: 0x05, Reset: 0x00, Name: BURST_EN SOFTWARE RESET REGISTER Address: 0x0B, Reset: 0x00, Name: SOFT_RESETB OUTLINE DIMENSIONS ORDERING GUIDE