Datasheet ADG5412W (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | High Voltage Latch-Up Proof, Quad SPST Switches |
| Pages / Page | 20 / 4 — ADG5412W. Data Sheet. ±20 V DUAL SUPPLY. Table 2. Typ. Parameter. Min. … |
| Revision | A |
| File Format / Size | PDF / 397 Kb |
| Document Language | English |
ADG5412W. Data Sheet. ±20 V DUAL SUPPLY. Table 2. Typ. Parameter. Min. Max. Unit. Test Conditions/Comments
Model Line for this Datasheet
Text Version of Document
link to page 14 link to page 14 link to page 14 link to page 14 link to page 15 link to page 15 link to page 15 link to page 14 link to page 14 link to page 14 link to page 14 link to page 14 link to page 4
ADG5412W Data Sheet ±20 V DUAL SUPPLY
VDD = +20 V ± 10%, VSS = −20 V ± 10%, GND = 0 V, TA = –40°C to +125°C, unless otherwise noted.
Table 2. Typ Parameter Min
(TA = 25°C)
Max Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VDD to VSS V On Resistance, RON 9 15 Ω VDD = +18 V, VSS = −18 V, VS = ±15 V, IS = −10 mA; see Figure 24 On-Resistance Match Between 0.35 1.1 Ω VS = ±15 V, IS = −10 mA Channels, ∆RON On-Resistance Flatness, RFLAT (ON) 1.5 2.5 Ω VS = ±15 V, IS = −10 mA LEAKAGE CURRENTS VDD = +22 V, VSS = −22 V Source Off Leakage, IS (Off) ±0.05 ±10 nA VS = ±15 V, VD = 15 V; see Figure 27 Drain Off Leakage, ID (Off) ±0.05 ±10 nA VS = ±15 V, VD = 15 V; see Figure 27 Channel On Leakage, ID (On), IS (On) ±0.1 ±20 nA VS = VD = ±15 V; see Figure 23 DIGITAL INPUTS Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V Input Current, IINL or IINH 0.002 µA VIN = VGND or VDD ±0.1 µA Digital Input Capacitance, CIN 2.5 pF DYNAMIC CHARACTERISTICS1 tON 158 240 ns VS = 10 V; see Figure 30, RL = 300 Ω, CL = 35 pF tOFF 110 170 ns VS = 10 V; see Figure 30, RL = 300 Ω, CL = 35 pF Charge Injection, QINJ 310 pC VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 31 Off Isolation −78 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 26 Channel-to-Channel Crosstalk −70 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 25 Total Harmonic Distortion + Noise 0.007 % RL = 1 kΩ, 20 V p-p, f = 20 Hz to 20 kHz; see Figure 28 −3 dB Bandwidth 160 MHz RL = 50 Ω, CL = 5 pF; see Figure 29 Insertion Loss −0.6 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 CS (Off) 17 pF VS = 0 V, f = 1 MHz CD (Off) 17 pF VS = 0 V, f = 1 MHz CD (On), CS (On) 60 pF VS = 0 V, f = 1 MHz POWER REQUIREMENTS VDD = +22 V, VSS = −22 V IDD 50 110 µA Digital inputs = 0 V or VDD ISS 0.001 1 µA Digital inputs = 0 V or VDD VDD/VSS ±9 ±22 V GND = 0 V 1 Guaranteed by design; not subject to production test. Rev. A | Page 4 of 20 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications ±15 V Dual Supply ±20 V Dual Supply 12 V Single Supply 36 V Single Supply Continuous Current per Channel, Sx or Dx Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Applications Information Trench Isolation Outline Dimensions Ordering Guide Automotive Products
ADG5412W Data Sheet ±20 V DUAL SUPPLY
VDD = +20 V ± 10%, VSS = −20 V ± 10%, GND = 0 V, TA = –40°C to +125°C, unless otherwise noted.
Table 2. Typ Parameter Min
(TA = 25°C)
Max Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VDD to VSS V On Resistance, RON 9 15 Ω VDD = +18 V, VSS = −18 V, VS = ±15 V, IS = −10 mA; see Figure 24 On-Resistance Match Between 0.35 1.1 Ω VS = ±15 V, IS = −10 mA Channels, ∆RON On-Resistance Flatness, RFLAT (ON) 1.5 2.5 Ω VS = ±15 V, IS = −10 mA LEAKAGE CURRENTS VDD = +22 V, VSS = −22 V Source Off Leakage, IS (Off) ±0.05 ±10 nA VS = ±15 V, VD = 15 V; see Figure 27 Drain Off Leakage, ID (Off) ±0.05 ±10 nA VS = ±15 V, VD = 15 V; see Figure 27 Channel On Leakage, ID (On), IS (On) ±0.1 ±20 nA VS = VD = ±15 V; see Figure 23 DIGITAL INPUTS Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V Input Current, IINL or IINH 0.002 µA VIN = VGND or VDD ±0.1 µA Digital Input Capacitance, CIN 2.5 pF DYNAMIC CHARACTERISTICS1 tON 158 240 ns VS = 10 V; see Figure 30, RL = 300 Ω, CL = 35 pF tOFF 110 170 ns VS = 10 V; see Figure 30, RL = 300 Ω, CL = 35 pF Charge Injection, QINJ 310 pC VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 31 Off Isolation −78 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 26 Channel-to-Channel Crosstalk −70 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 25 Total Harmonic Distortion + Noise 0.007 % RL = 1 kΩ, 20 V p-p, f = 20 Hz to 20 kHz; see Figure 28 −3 dB Bandwidth 160 MHz RL = 50 Ω, CL = 5 pF; see Figure 29 Insertion Loss −0.6 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 CS (Off) 17 pF VS = 0 V, f = 1 MHz CD (Off) 17 pF VS = 0 V, f = 1 MHz CD (On), CS (On) 60 pF VS = 0 V, f = 1 MHz POWER REQUIREMENTS VDD = +22 V, VSS = −22 V IDD 50 110 µA Digital inputs = 0 V or VDD ISS 0.001 1 µA Digital inputs = 0 V or VDD VDD/VSS ±9 ±22 V GND = 0 V 1 Guaranteed by design; not subject to production test. Rev. A | Page 4 of 20 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications ±15 V Dual Supply ±20 V Dual Supply 12 V Single Supply 36 V Single Supply Continuous Current per Channel, Sx or Dx Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Applications Information Trench Isolation Outline Dimensions Ordering Guide Automotive Products
