Datasheet ADG1233, ADG1234 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Low Capacitance, Triple/Quad SPDT ±15 V/+12 V iCMOS Switches |
| Pages / Page | 17 / 10 — ADG1233/ADG1234. Data Sheet. TERMINOLOGY VDD. tOFF (EN). tTRANSITION. … |
| Revision | D |
| File Format / Size | PDF / 450 Kb |
| Document Language | English |
ADG1233/ADG1234. Data Sheet. TERMINOLOGY VDD. tOFF (EN). tTRANSITION. GND. VINL. S (Off ). VINH. D (Off ). IINL, IINH. D, IS (On). IDD. D, VS. ISS
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ADG1233/ADG1234 Data Sheet TERMINOLOGY VDD tOFF (EN)
Most positive supply potential. Delay time between the 50% and 90% points of the digital input
V
and switch off condition.
SS
Most negative power supply potential in dual supplies. In
tTRANSITION
single-supply applications, it can be connected to ground. Delay time between the 50% and 90% points of the digital
GND
inputs and the switch on condition when switching from one Ground (0 V) reference. address state to another.
R
tBBM
ON
Ohmic resistance between D and S. Off time measured between the 80% point of both switches
ΔR
when switching from one address state to another.
ON
Difference between the RON of any two channels.
VINL I
Maximum input voltage for Logic 0.
S (Off )
Source leakage current when switch is off.
VINH I
Minimum input voltage for Logic 1.
D (Off )
Drain leakage current when switch is off.
IINL, IINH I
Input current of the digital input.
D, IS (On)
Channel leakage current when switch is on.
IDD V
Positive supply current.
D, VS
Analog voltage on Terminal D, Terminal S.
ISS C
Negative supply current.
S (Off )
Channel input capacitance for off condition.
Off Isolation C
A measure of an unwanted signal coupling through an off channel.
D (Off )
Channel output capacitance for off condition.
Charge Injection C
A measure of the glitch impulse transferred from the digital
D, CS (On)
On switch capacitance. input to the analog output during switching.
C Bandwidth IN
Digital input capacitance. Frequency at which the output is attenuated by 3 dB.
t On Response ON (EN)
Delay time between the 50% and 90% points of the digital input Frequency response of the on switch. and switch on condition.
THD + N
Ratio of the harmonic amplitude plus noise of the signal to the fundamental. Rev. D | Page 10 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
Most positive supply potential. Delay time between the 50% and 90% points of the digital input
V
and switch off condition.
SS
Most negative power supply potential in dual supplies. In
tTRANSITION
single-supply applications, it can be connected to ground. Delay time between the 50% and 90% points of the digital
GND
inputs and the switch on condition when switching from one Ground (0 V) reference. address state to another.
R
tBBM
ON
Ohmic resistance between D and S. Off time measured between the 80% point of both switches
ΔR
when switching from one address state to another.
ON
Difference between the RON of any two channels.
VINL I
Maximum input voltage for Logic 0.
S (Off )
Source leakage current when switch is off.
VINH I
Minimum input voltage for Logic 1.
D (Off )
Drain leakage current when switch is off.
IINL, IINH I
Input current of the digital input.
D, IS (On)
Channel leakage current when switch is on.
IDD V
Positive supply current.
D, VS
Analog voltage on Terminal D, Terminal S.
ISS C
Negative supply current.
S (Off )
Channel input capacitance for off condition.
Off Isolation C
A measure of an unwanted signal coupling through an off channel.
D (Off )
Channel output capacitance for off condition.
Charge Injection C
A measure of the glitch impulse transferred from the digital
D, CS (On)
On switch capacitance. input to the analog output during switching.
C Bandwidth IN
Digital input capacitance. Frequency at which the output is attenuated by 3 dB.
t On Response ON (EN)
Delay time between the 50% and 90% points of the digital input Frequency response of the on switch. and switch on condition.
THD + N
Ratio of the harmonic amplitude plus noise of the signal to the fundamental. Rev. D | Page 10 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
