Datasheet ADG438F, ADG439F (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | High Performance, 4-/8-Channel, Fault-Protected Analog Multiplexers |
| Pages / Page | 16 / 10 — ADG438F/ADG439F. VS1. ADDRESS. 50%. DRIVE (V. 50Ω. S2 TO S7. IN). VS8. … |
| Revision | E |
| File Format / Size | PDF / 325 Kb |
| Document Language | English |
ADG438F/ADG439F. VS1. ADDRESS. 50%. DRIVE (V. 50Ω. S2 TO S7. IN). VS8. ADG438F*. 2.4V. VOUT. GND. 90%. 1MΩ. 35pF. *SIMILAR CONNECTION FOR ADG439F
Model Line for this Datasheet
Text Version of Document
ADG438F/ADG439F V V DD SS V V 3V DD SS A2 S1 VS1 ADDRESS 50% V A1 DRIVE (V IN 50Ω S2 TO S7 IN) 50% A0 S8 VS8 ADG438F* 2.4V EN D VOUT R C GND L L 90% 1MΩ 35pF VOUT 90% *SIMILAR CONNECTION FOR ADG439F.
24 0
tTRANSITION tTRANSITION
0468- 0 Figure 25. Switching Time of Multiplexer, tTRANSITION
V V DD SS 3V ADDRESS V V DD SS DRIVE (VIN) A2 S1 VS V A1 IN 50Ω S2 TO S7 A0 ADG438F*S8 D VOUT 2.4V EN VOUT 80% 80% R C GND L L 1kΩ 35pF tOPEN
029 8-
**SIMILAR CONNECTION FOR ADG439F.
046 0 Figure 26. Break-Before-Make Delay, tOPEN
V V DD SS 3V ENABLE V V DD SS 50% 50% DRIVE (VIN) A2 S1 VS A1 0V S2 TO S8 A0 ADG438F* VOUT 0.9VOUT D VOUT EN OUTPUT R C VIN 50Ω GND L L 1kΩ 35pF 0.1VOUT 0V tON (EN) tOFF (EN)
0 -03
*SIMILAR CONNECTION FOR ADG439F.
468 00 Figure 27. Enable Delay, tON (EN), tOFF (EN) Rev. E | Page 10 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION OUTLINE DIMENSIONS ORDERING GUIDE
24 0
tTRANSITION tTRANSITION
0468- 0 Figure 25. Switching Time of Multiplexer, tTRANSITION
V V DD SS 3V ADDRESS V V DD SS DRIVE (VIN) A2 S1 VS V A1 IN 50Ω S2 TO S7 A0 ADG438F*S8 D VOUT 2.4V EN VOUT 80% 80% R C GND L L 1kΩ 35pF tOPEN
029 8-
**SIMILAR CONNECTION FOR ADG439F.
046 0 Figure 26. Break-Before-Make Delay, tOPEN
V V DD SS 3V ENABLE V V DD SS 50% 50% DRIVE (VIN) A2 S1 VS A1 0V S2 TO S8 A0 ADG438F* VOUT 0.9VOUT D VOUT EN OUTPUT R C VIN 50Ω GND L L 1kΩ 35pF 0.1VOUT 0V tON (EN) tOFF (EN)
0 -03
*SIMILAR CONNECTION FOR ADG439F.
468 00 Figure 27. Enable Delay, tON (EN), tOFF (EN) Rev. E | Page 10 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION OUTLINE DIMENSIONS ORDERING GUIDE
