Datasheet ADG528F (Analog Devices)

8-Channel Fault-Protected Analog Multiplexer ADG528F FEATURES FUNCTIONAL BLOCK DIAGRAM Low on resistance (300 Ω typical) Fast switching times ADG528F tON: 250 ns maximum S1 tOFF: 250 ns maximum Low power dissipation (3.3 mW maximum) Fault and overvoltage protection (−40 V to +55 V) D All switches off with power supply off Analog output of on channel clamped within power supplies if an overvoltage occurs S8 Latch-up proof construction WR 1 OF 8 Break-before-make construction DECODER RS TTL and CMOS compatible inputs
1 00 5-
APPLICATIONS A0 A1 A2 EN
65 09 Figure 1.
Existing multiplexer applications (both fault-protected and nonfault-protected) New designs requiring multiplexer functions GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The ADG528F1 is a CMOS analog multiplexer, with the 1. Fault protection. comprising eight single channels. This multiplexer provides The ADG528F can withstand continuous voltage inputs fault protection. Using a series n-channel, p-channel, n-channel from −40 V to +55 V. When a fault occurs due to the MOSFET structure, both device and signal source protection is power supplies being turned off, all the channels are turned provided in the event of an overvoltage or power loss. The off and only a leakage current of a few nanoamperes flows. multiplexer can withstand continuous overvoltage inputs 2. On channel turns off while fault exists. from −40 V to +55 V. During fault conditions, the multiplexer 3. Low RON. input (or output) appears as an open circuit and only a few 4. Fast switching times. nanoamperes of leakage current will flow. This protects not 5. Break-before-make switching. only the multiplexer and the circuitry driven by the multiplexer, Switches are guaranteed break-before-make so that input but also protects the sensors or signal sources that drive the signals are protected against momentary shorting. multiplexer. 6. Trench isolation eliminates latch-up. The ADG528F switches one of eight inputs to a common output A dielectric trench separates the p-channel and n-channel as determined by the 3-bit binary address lines A0, A1, and A2. MOSFETs thereby preventing latch-up. The ADG528F has on-chip address and control latches that facilitate microprocessor interfacing. An EN input on the device is used to enable or disable the device. When disabled, all channels are switched off.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY TRUTH TABLE TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE