Datasheet VNF1048F (STMicroelectronics) - 7
| Manufacturer | STMicroelectronics |
| Description | High-side switch Controller with intelligent fuse protection for 12 V, 24 V and 48 V automotive applications |
| Pages / Page | 52 / 7 — VNF1048F. Main electrical characteristics. Table 5. SPI logic inputs … |
| File Format / Size | PDF / 2.6 Mb |
| Document Language | English |
VNF1048F. Main electrical characteristics. Table 5. SPI logic inputs (CSN, SCK and SDI) specification. Symbol. Parameter
Model Line for this Datasheet
Text Version of Document
VNF1048F Main electrical characteristics Table 5. SPI logic inputs (CSN, SCK and SDI) specification ID Symbol Parameter Test conditions Min. Typ. Max. Unit
Low level Input current (SCK and SDI) 0.5 5 µA 2.1 IIL VIL = 0.3 * VSPI Low level Input current (CSN) -0.5 µA High level Input current (SCK and SDI) 0.5 5 µA 2.2 IIH VIL = 0.7 * VSPI High level Input current (CSN) -0.5 µA 2.3 VIL Low level Input voltage 0.3 * VSPI V 2.4 VIH High level input voltage 0.7 * VSPI V 2.5 VI_HYST Input hysteresis voltage 0.4 V VSPI 2.6 VICL SCK and SDI clamping voltage V + 0.6
Table 6. SPI logic outputs (SDO) Specification ID Symbol Parameter Test conditions Min. Typ. Max. Unit
2.7 VOL Low level output voltage 0.2 * VSPI V 2.8 VOH High level output voltage 0.8 * VSPI V 2.9 ILO Output leakage current -10 10 µA
Table 7. HWLO logic input pin specification ID Symbol Parameter Test conditions Min. Typ. Max. Unit
2.10 IIL Low level Input current 0.5 1 µA 2.11 IIH High level Input current 10 µA 2.12 VIL Low level Input voltage 0.9 V 2.13 VIH High level input voltage 2.1 V 2.14 VI_HYST Input hysteresis voltage 0.4 V 2.15 tHWLO HWLO filtering time 33 µs
Table 8. DIAG logic output pin specification ID Symbol Parameter Test conditions Min. Typ. Max. Unit
2.16 VDIAG_PD DIAG pin open-drain pull down voltage 0.2 V 2.17 IDIAG_PD DIAG pin open-drain input current VDIAG = VDIAG_PD 1 mA 2.18 IDIAG_LKG DIAG pin open-drain leakage current VDIAG = VSPI = 5.5 V 0 1 µA
Table 9. Device Thermal shutdown ID Symbol Parameter Test conditions Min. Typ. Max. Unit
Junction temperature thermal shutdown 2.19 TTSD 160 175 190 °C threshold Junction temperature thermal shutdown 2.20 TTSD_HYS 15 °C hysteresis
DS13084
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Rev 6 page 7/52
Document Outline 1 Block diagram and pin description 2 Electrical specification 2.1 Absolute maximum ratings 2.2 Thermal data 2.3 Main electrical characteristics 3 eFuse function 4 Self Test 4.1 Current Sense Self Test 4.2 External FET VDS Detection Self Test 4.3 External FET Stuck-on Self Test 5 Protections 5.1 Battery undervoltage shutdown 5.2 Device overtemperature shutdown 5.3 External MOSFET overtemperature shutdown 5.4 External MOSFET desaturation shut-down 5.5 Hard short circuit latch-off 5.6 Current vs time latch-off 5.7 Low Current Bypass desaturation shut-down 6 SPI functional description 6.1 SPI Communication 6.2 Signal description 6.3 SPI protocol 6.4 Operating code definition 6.5 Write mode 6.6 Read mode 6.7 Read and clear status command 6.8 SPI device information 6.9 Special commands 6.10 Global status byte 6.11 Address map 6.12 ROM memory map 6.13 Control registers 6.14 Status registers 6.15 Timeout watchdog 7 Operating modes 7.1 State Diagram 7.2 PowerON mode 7.3 Stand-by mode 7.4 WakeUp mode 7.5 Unlocked mode 7.6 Locked mode 7.7 Self-test mode 8 Application information 9 Package information 9.1 QFN32L 5x5 package information Revision history
Low level Input current (SCK and SDI) 0.5 5 µA 2.1 IIL VIL = 0.3 * VSPI Low level Input current (CSN) -0.5 µA High level Input current (SCK and SDI) 0.5 5 µA 2.2 IIH VIL = 0.7 * VSPI High level Input current (CSN) -0.5 µA 2.3 VIL Low level Input voltage 0.3 * VSPI V 2.4 VIH High level input voltage 0.7 * VSPI V 2.5 VI_HYST Input hysteresis voltage 0.4 V VSPI 2.6 VICL SCK and SDI clamping voltage V + 0.6
Table 6. SPI logic outputs (SDO) Specification ID Symbol Parameter Test conditions Min. Typ. Max. Unit
2.7 VOL Low level output voltage 0.2 * VSPI V 2.8 VOH High level output voltage 0.8 * VSPI V 2.9 ILO Output leakage current -10 10 µA
Table 7. HWLO logic input pin specification ID Symbol Parameter Test conditions Min. Typ. Max. Unit
2.10 IIL Low level Input current 0.5 1 µA 2.11 IIH High level Input current 10 µA 2.12 VIL Low level Input voltage 0.9 V 2.13 VIH High level input voltage 2.1 V 2.14 VI_HYST Input hysteresis voltage 0.4 V 2.15 tHWLO HWLO filtering time 33 µs
Table 8. DIAG logic output pin specification ID Symbol Parameter Test conditions Min. Typ. Max. Unit
2.16 VDIAG_PD DIAG pin open-drain pull down voltage 0.2 V 2.17 IDIAG_PD DIAG pin open-drain input current VDIAG = VDIAG_PD 1 mA 2.18 IDIAG_LKG DIAG pin open-drain leakage current VDIAG = VSPI = 5.5 V 0 1 µA
Table 9. Device Thermal shutdown ID Symbol Parameter Test conditions Min. Typ. Max. Unit
Junction temperature thermal shutdown 2.19 TTSD 160 175 190 °C threshold Junction temperature thermal shutdown 2.20 TTSD_HYS 15 °C hysteresis
DS13084
-
Rev 6 page 7/52
Document Outline 1 Block diagram and pin description 2 Electrical specification 2.1 Absolute maximum ratings 2.2 Thermal data 2.3 Main electrical characteristics 3 eFuse function 4 Self Test 4.1 Current Sense Self Test 4.2 External FET VDS Detection Self Test 4.3 External FET Stuck-on Self Test 5 Protections 5.1 Battery undervoltage shutdown 5.2 Device overtemperature shutdown 5.3 External MOSFET overtemperature shutdown 5.4 External MOSFET desaturation shut-down 5.5 Hard short circuit latch-off 5.6 Current vs time latch-off 5.7 Low Current Bypass desaturation shut-down 6 SPI functional description 6.1 SPI Communication 6.2 Signal description 6.3 SPI protocol 6.4 Operating code definition 6.5 Write mode 6.6 Read mode 6.7 Read and clear status command 6.8 SPI device information 6.9 Special commands 6.10 Global status byte 6.11 Address map 6.12 ROM memory map 6.13 Control registers 6.14 Status registers 6.15 Timeout watchdog 7 Operating modes 7.1 State Diagram 7.2 PowerON mode 7.3 Stand-by mode 7.4 WakeUp mode 7.5 Unlocked mode 7.6 Locked mode 7.7 Self-test mode 8 Application information 9 Package information 9.1 QFN32L 5x5 package information Revision history
