Datasheet PEMD12, PUMD12 (Nexperia) - 6
| Manufacturer | Nexperia |
| Description | NPN/PNP Resistor-Equipped Transistors; R1 = 47 kΩ, R2 = 47 kΩ |
| Pages / Page | 17 / 6 — NXP Semiconductors. PEMD12; PUMD12. NPN/PNP resistor-equipped … |
| Revision | 12102022 |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
NXP Semiconductors. PEMD12; PUMD12. NPN/PNP resistor-equipped transistors; R1 = 47 k. , R2 = 47 k. Fig 2
Model Line for this Datasheet
Text Version of Document
NXP Semiconductors PEMD12; PUMD12 NPN/PNP resistor-equipped transistors; R1 = 47 k , R2 = 47 k
006aac751 103 duty cycle = 1 Zth(j-a) 0.75 (K/W) 0.5 0.33 102 0.2 0.1 0.05 0.02 0.01 10 0 1 10-5 10-3 10-2 10-4 10 102 10-1 103 1 tp (s) FR4 PCB, standard footprint
Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for PEMD12 (SOT666); typical values
006aac750 103 duty cycle = 1 Zth(j-a) 0.75 (K/W) 0.5 0.33 102 0.2 0.1 0.05 0.02 0.01 10 0 1 10-5 10-3 10-2 10-4 10 102 10-1 103 1 tp (s) FR4 PCB, standard footprint
Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for PUMD12 (SOT363); typical values
PEMD12_PUMD12 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 21 November 2011 5 of 16
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Marking 5. Limiting values 6. Thermal characteristics 7. Characteristics 8. Test information 8.1 Quality information 9. Package outline 10. Packing information 11. Soldering 12. Revision history 13. Legal information 13.1 Data sheet status 13.2 Definitions 13.3 Disclaimers 13.4 Trademarks 14. Contact information 15. Contents
006aac751 103 duty cycle = 1 Zth(j-a) 0.75 (K/W) 0.5 0.33 102 0.2 0.1 0.05 0.02 0.01 10 0 1 10-5 10-3 10-2 10-4 10 102 10-1 103 1 tp (s) FR4 PCB, standard footprint
Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for PEMD12 (SOT666); typical values
006aac750 103 duty cycle = 1 Zth(j-a) 0.75 (K/W) 0.5 0.33 102 0.2 0.1 0.05 0.02 0.01 10 0 1 10-5 10-3 10-2 10-4 10 102 10-1 103 1 tp (s) FR4 PCB, standard footprint
Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration for PUMD12 (SOT363); typical values
PEMD12_PUMD12 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 21 November 2011 5 of 16
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Marking 5. Limiting values 6. Thermal characteristics 7. Characteristics 8. Test information 8.1 Quality information 9. Package outline 10. Packing information 11. Soldering 12. Revision history 13. Legal information 13.1 Data sheet status 13.2 Definitions 13.3 Disclaimers 13.4 Trademarks 14. Contact information 15. Contents
