IRF640, SiHF640 www.vishay.com Vishay Siliconix L VDS Vary tp to obtain QG required IAS 10 V R D.U.T G + Q Q V GS GD - DD IAS V 10 V G t 0.01 p Ω Charge Fig. 12a - Unclamped Inductive Test CircuitFig. 13a - Basic Gate Charge Waveform V Current regulator DS Same type as D.U.T. tp VDD 50 kΩ 12 V 0.2 µF 0.3 µF VDS + V D.U.T. DS - IAS VGS 3 mA Fig. 12b - Unclamped Inductive Waveforms I I G D Current sampling resistors 1400 Fig. 13b - Gate Charge Test Circuit ID 1200 Top 6.0 A 11.0 A Bottom 18.0 A 1000 800 600 400 , Single Pulse Energy (mJ) AS 200 E V = 50 V DD 0 25 50 75 100 125 150 91036_12c Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current S15-2667-Rev. C, 16-Nov-15 5 Document Number: 91036 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000