Datasheet 74HC595 (Diodes) - 3

74HC595 Functional Description and Timing Diagram Control Input Output Function SHCP STCP DS Q7S Qn
Low-level asserted on MR clears shift register. X X L L  L NC Storage register is unchanged. X  L L  L L Empty shift register transferred to storage register. X X H L  L Z Shift register remains clear; All Q ouputs in Z state. HIGH is shifted into first stage of Shift Register Contents of each  register shifted to next register. X L H  Q6S NC The content of Q6S has been shifted to Q7S and now appears on device pin Q7S. Contents of shift register copied to storage register. With output now X  L H  NC QnS in active state the storage resister contents appear on Q outputs.  Contents of shift register copied to output register then shift register  L H  Q6S QnS shifted. H=HIGH Voltage State L=LOW Voltage State =LOW to HIGH Transition X= Don’T Care – High or Low (Not Floating) NC= No Change Z= High-Impedance State SHCP DS STCP MR OE Z-state Q0 Z-state Q1 Z-state Q6 Z-state Q7 Q7S 74HC595 3 of 11 November 2018 Document number: DS35492 Rev. 4 - 2
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