Datasheet MAX20480 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Four- to Seven-Input Automotive Power- System Monitor Family |
| Pages / Page | 41 / 9 — MAX20480B. MAX20480C |
| File Format / Size | PDF / 575 Kb |
| Document Language | English |
MAX20480B. MAX20480C
Model Line for this Datasheet
Text Version of Document
MAX20480 Four- to Seven-Input Automotive Power-System Monitor Family
MAX20480B
TOP VIEW GND GND GND IN5 12 11 10 9 RESET 13 8 VDD ADDR 14 7 EN1 MAX20480 SDA 15 6 GND SCL 16 5 EN0 + 1 2 3 4 IN1 IN2 IN3 IN4 TQFN 3mm x 3mm
MAX20480C
TOP VIEW GND INM IN6P IN5 12 11 10 9 RESET 13 8 VDD ADDR 14 7 EN1 MAX20480 SDA 15 6 GND SCL 16 5 EN0 + 1 2 3 4 IN1 IN2 IN3 IN4 TQFN 3mm x 3mm www.maximintegrated.com Maxim Integrated | 9 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 16-TQFN-EP Electrical Characteristics Electrical Characteristics (continued) Typical Operating Characteristics Typical Operating Characteristics (continued) Pin Configurations MAX20480A MAX20480B MAX20480C MAX20480D Pin Description Pin Description (continued) Functional Diagram Detailed Description I2C Interface Bit Transfer STOP and START Conditions Early STOP Condition Clock Stretching I2C General Call Address Packet Error Checking (PEC) Slave Address Acknowledge Write-Data Format Read-Data Format Voltage Monitor DVS Operation DVS Command Sequence (Low to High): DVS Command Sequence (High to Low): I2C DVS Timing Example (Low to High) Flexible Power Sequence Recorder Windowed Watchdog and Reset Control Sample C Code For Challenge/Response Watchdog Window Settings RESET Output Enable Inputs (EN0/EN1) Comparator Power States Register Map Top Level Register Details ID (0x00) CONFIG1 (0x01) CONFIG2 (0x02) VMON (0x03) RSTMAP (0x4) STATOV (0x5) STATUV (0x6) STATOFF (0x7) VIN1 (0x8) VIN2 (0x9) VIN3 (0xA) VIN4 (0xB) VIN5 (0xC) VINO6 (0xD) VINU6 (0xE) VINO7 (0xF) VINU7 (0x10) OVUV1 (0x11) OVUV2 (0x12) OVUV3 (0x13) OVUV4 (0x14) OVUV5 (0x15) FPSSTAT1 (0x16) FPSCFG1 (0x17) UTIME1 (0x18) UTIME2 (0x19) UTIME3 (0x1A) UTIME4 (0x1B) UTIME5 (0x1C) UTIME6 (0x1D) UTIME7 (0x1E) DTIME1 (0x1F) DTIME2 (0x20) DTIME3 (0x21) DTIME4 (0x22) DTIME5 (0x23) DTIME6 (0x24) DTIME7 (0x25) WDSTAT (0x26) WDCDIV (0x27) WDCFG1 (0x28) WDCFG2 (0x29) WDKEY (0x2A) WDLOCK (0x2B) RSTCTRL (0x2C) CID (0x2D) Applications Information Diagnostics Typical Application Circuit Ordering Information Revision History
MAX20480B
TOP VIEW GND GND GND IN5 12 11 10 9 RESET 13 8 VDD ADDR 14 7 EN1 MAX20480 SDA 15 6 GND SCL 16 5 EN0 + 1 2 3 4 IN1 IN2 IN3 IN4 TQFN 3mm x 3mm
MAX20480C
TOP VIEW GND INM IN6P IN5 12 11 10 9 RESET 13 8 VDD ADDR 14 7 EN1 MAX20480 SDA 15 6 GND SCL 16 5 EN0 + 1 2 3 4 IN1 IN2 IN3 IN4 TQFN 3mm x 3mm www.maximintegrated.com Maxim Integrated | 9 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 16-TQFN-EP Electrical Characteristics Electrical Characteristics (continued) Typical Operating Characteristics Typical Operating Characteristics (continued) Pin Configurations MAX20480A MAX20480B MAX20480C MAX20480D Pin Description Pin Description (continued) Functional Diagram Detailed Description I2C Interface Bit Transfer STOP and START Conditions Early STOP Condition Clock Stretching I2C General Call Address Packet Error Checking (PEC) Slave Address Acknowledge Write-Data Format Read-Data Format Voltage Monitor DVS Operation DVS Command Sequence (Low to High): DVS Command Sequence (High to Low): I2C DVS Timing Example (Low to High) Flexible Power Sequence Recorder Windowed Watchdog and Reset Control Sample C Code For Challenge/Response Watchdog Window Settings RESET Output Enable Inputs (EN0/EN1) Comparator Power States Register Map Top Level Register Details ID (0x00) CONFIG1 (0x01) CONFIG2 (0x02) VMON (0x03) RSTMAP (0x4) STATOV (0x5) STATUV (0x6) STATOFF (0x7) VIN1 (0x8) VIN2 (0x9) VIN3 (0xA) VIN4 (0xB) VIN5 (0xC) VINO6 (0xD) VINU6 (0xE) VINO7 (0xF) VINU7 (0x10) OVUV1 (0x11) OVUV2 (0x12) OVUV3 (0x13) OVUV4 (0x14) OVUV5 (0x15) FPSSTAT1 (0x16) FPSCFG1 (0x17) UTIME1 (0x18) UTIME2 (0x19) UTIME3 (0x1A) UTIME4 (0x1B) UTIME5 (0x1C) UTIME6 (0x1D) UTIME7 (0x1E) DTIME1 (0x1F) DTIME2 (0x20) DTIME3 (0x21) DTIME4 (0x22) DTIME5 (0x23) DTIME6 (0x24) DTIME7 (0x25) WDSTAT (0x26) WDCDIV (0x27) WDCFG1 (0x28) WDCFG2 (0x29) WDKEY (0x2A) WDLOCK (0x2B) RSTCTRL (0x2C) CID (0x2D) Applications Information Diagnostics Typical Application Circuit Ordering Information Revision History
