Datasheet MC145026, MC145027, MC145028 (NXP) - 9
| Manufacturer | NXP |
| Description | Encoder and Decoder Pairs CMOS |
| Pages / Page | 20 / 9 — Pin Descriptions. 3.2. MC145027. 3.3. MC145028. 4.1. MC145026 Encoder. A1 … |
| File Format / Size | PDF / 810 Kb |
| Document Language | English |
Pin Descriptions. 3.2. MC145027. 3.3. MC145028. 4.1. MC145026 Encoder. A1 - A5, A6/D6 - A9/D9
Model Line for this Datasheet
Text Version of Document
link to page 12 link to page 12
Pin Descriptions
“low” levels are 70% and 30% of the supply voltage as shown in the Electrical Characteristics table. The weak “output” device sinks/sources up to 110 µA at a 5 V supply level, 500 µA at 10 V, and 1 mA at 15 V. The TE input has an internal pull-up device so that a simple switch may be used to force the input low. While TE is high, the encoder is completely disabled, the oscillator is inhibited, and the current drain is reduced to quiescent current. When TE is brought low, the oscillator is started and the transmit sequence begins. The inputs are then sequentially selected, and determinations are made as to the input logic states. This information is serially transmitted via the Dout pin.
3.2 MC145027
This decoder receives the serial data from the encoder and outputs the data, if it is valid. The transmitted data, consisting of two identical words, is examined bit by bit during reception. The first five trinary digits are assumed to be the address. If the received address matches the local address, the next four (data) bits are internally stored, but are not transferred to the output data latch. As the second encoded word is received, the address must again match. If a match occurs, the new data bits are checked against the previously stored data bits. If the two nibbles of data (four bits each) match, the data is transferred to the output data latch by VT and remains until new data replaces it. At the same time, the VT output pin is brought high and remains high until an error is received or until no input signal is received for four data periods (see Figure 11). Although the address information may be encoded in trinary, the data information must be either a 1 or 0. A trinary (open) data line is decoded as a logic 1.
3.3 MC145028
This decoder operates in the same manner as the MC145027 except that nine address lines are used and no data output is available. The VT output is used to indicate that a valid address has been received. For transmission security, two identical transmitted words must be consecutively received before a VT output signal is issued. The MC145028 allows 19,683 addresses when trinary levels are used. 512 addresses are possible when binary levels are used.
4 Pin Descriptions 4.1 MC145026 Encoder A1 - A5, A6/D6 - A9/D9 Address, Address/Data Inputs (Pins 1 - 7, 9, and 10)
These address/data inputs are encoded and the data is sent serially from the encoder via the Dout pin.
RS, CTC, RTC (Pins 11, 12, and 13)
These pins are part of the oscillator section of the encoder (see Figure 10).
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor 9 Document Outline 1 Introduction 2 Electrical Specifications 3 Operating Characteristics 3.1 MC145026 3.2 MC145027 3.3 MC145028 4 Pin Descriptions 4.1 MC145026 Encoder 4.2 MC145027 and MC145028 Decoders 5 MC145027 and MC145028 Timing 6 Package Dimensions
Pin Descriptions
“low” levels are 70% and 30% of the supply voltage as shown in the Electrical Characteristics table. The weak “output” device sinks/sources up to 110 µA at a 5 V supply level, 500 µA at 10 V, and 1 mA at 15 V. The TE input has an internal pull-up device so that a simple switch may be used to force the input low. While TE is high, the encoder is completely disabled, the oscillator is inhibited, and the current drain is reduced to quiescent current. When TE is brought low, the oscillator is started and the transmit sequence begins. The inputs are then sequentially selected, and determinations are made as to the input logic states. This information is serially transmitted via the Dout pin.
3.2 MC145027
This decoder receives the serial data from the encoder and outputs the data, if it is valid. The transmitted data, consisting of two identical words, is examined bit by bit during reception. The first five trinary digits are assumed to be the address. If the received address matches the local address, the next four (data) bits are internally stored, but are not transferred to the output data latch. As the second encoded word is received, the address must again match. If a match occurs, the new data bits are checked against the previously stored data bits. If the two nibbles of data (four bits each) match, the data is transferred to the output data latch by VT and remains until new data replaces it. At the same time, the VT output pin is brought high and remains high until an error is received or until no input signal is received for four data periods (see Figure 11). Although the address information may be encoded in trinary, the data information must be either a 1 or 0. A trinary (open) data line is decoded as a logic 1.
3.3 MC145028
This decoder operates in the same manner as the MC145027 except that nine address lines are used and no data output is available. The VT output is used to indicate that a valid address has been received. For transmission security, two identical transmitted words must be consecutively received before a VT output signal is issued. The MC145028 allows 19,683 addresses when trinary levels are used. 512 addresses are possible when binary levels are used.
4 Pin Descriptions 4.1 MC145026 Encoder A1 - A5, A6/D6 - A9/D9 Address, Address/Data Inputs (Pins 1 - 7, 9, and 10)
These address/data inputs are encoded and the data is sent serially from the encoder via the Dout pin.
RS, CTC, RTC (Pins 11, 12, and 13)
These pins are part of the oscillator section of the encoder (see Figure 10).
MC145026, MC145027, MC145028 Technical Data, Rev. 4
Freescale Semiconductor 9 Document Outline 1 Introduction 2 Electrical Specifications 3 Operating Characteristics 3.1 MC145026 3.2 MC145027 3.3 MC145028 4 Pin Descriptions 4.1 MC145026 Encoder 4.2 MC145027 and MC145028 Decoders 5 MC145027 and MC145028 Timing 6 Package Dimensions
