Datasheet SN8P2501 (SONiX Technology) - 3

ManufacturerSONiX Technology
Description8-Bit Micro Controller
Pages / Page11 / 3 — SN8P2501. V1.0. SN8IDE V1.99I. 1 CODE. OPTION. Code Option. Content. …
File Format / SizePDF / 131 Kb
Document LanguageEnglish

SN8P2501. V1.0. SN8IDE V1.99I. 1 CODE. OPTION. Code Option. Content. Function Description

SN8P2501 V1.0 SN8IDE V1.99I 1 CODE OPTION Code Option Content Function Description

Model Line for this Datasheet

Text Version of Document

SN8P2501
使用注意事項
V1.0 SN8P2501
使用注意事項 適用對象
:
客戶或代理商 SN8P2501 為 SONIX 新開發的 14 pin、1T (one clock per machine cycle) 8-bit MCU,內建 16MHz RC 震盪器, 最多有 12 I/O 可用,並具備優異的抗雜訊能力。在系統開發階段,軟、硬體注意事項請參考下文敘述,開發軟件 請用 “
SN8IDE V1.99I
” 或之後版本。(註:包裝正印 SN8PEV2501 為工程樣品,程式宣告一樣為 CHIP SN8P2501)。
1 CODE OPTION

Code Option Content Function Description
Low cost RC for external high clock oscillator and XOUT becomes to general Ext_RC purpose I/O (P1.2). Low frequency, power saving crystal (e.g. 32.768KHz) for external high clock 32K_X’tal oscillator. 12M_X’tal High speed crystal /resonator (e.g. 12MHz) for external high clock oscillator. High_Clk 4M_X’tal Standard crystal /resonator (e.g. 3.58M) for external high clock oscillator. Internal high RC 16MHz and external oscillator pins as general purpose I/O (XIN IHRC_16M to P1.3, XOUT to P1.2). Internal high RC 16MHz with RTC function and external oscillator pins connect IHRC_RTC with 32.768KHz crystal to generating real time clock. Enable Enable noise filter to enhance noise immunity performance. Noise_Filter Disable Disable noise filter. Always_On Watchdog timer always on. Watch_Dog Disable Disable Watchdog function. Fosc/1 Instruction cycle is oscillator clock. Fosc/2 Instruction cycle is 2 oscillator clocks. Fosc/4 Instruction cycle is 4 oscillator clocks. Fcpu Fosc/8 Instruction cycle is 8 oscillator clocks. Fosc/16 Instruction cycle is 16 oscillator clocks. http://www.DataSheet4U.net/ Fosc/32 Instruction cycle is 32 oscillator clocks. Fosc/64 Instruction cycle is 64 oscillator clocks. -2MHz Internal high RC 16MHz typical frequency - 2MHz. -1MHz Internal high RC 16MHz typical frequency -1MHz. 16M_IHRC Normal Internal high RC 16MHz typical frequency. +1MHz Internal high RC 16MHz typical frequency + 1MHz. +2MHz Internal high RC 16MHz typical frequency + 2MHz. Reset Enable External reset pin. Reset_Pin Disable External reset pin and the pin is as input only pin P1.1 without pull-up P11 resister. Enable Enable ROM code Security function. Security Disable Disable ROM code Security function. Enable Enable Low Power function to save Operating current. Low Power Disable Normal. 本資料為松翰科技股份有限公司專有之財產,非經書面許可不准透露或使用本資料,亦不准複印複製或轉變成任何其他形式使用。
The information contained herein is the exclusive property of SONiX technology Co., Ltd. and shall not be distributed

reproduced

or disclosed in whole or in part without prior written permission of SONiX technology Co., Ltd.
Page3 datasheet pdf - http://www.DataSheet4U.net/ Document Outline CODE OPTION: Fcpu code option: Noise Filter code option: Low Power: Watchdog操作注意事項: BIT TEST I/O: @B0TS0巨集程式: @B0TS1巨集程式: SN8P2501 S8KD-2 ICE 仿真注意事項表 P0.0 OUTPUT MODE EMULATION IN S8KD-2 ICE: @P00_MODE巨集說明: @P00_OUT巨集說明: 設定 PWM DUTY: ICE_MODE設置說明: @PWM0_MAX_DUTY巨集說明: PEDGE設定: @P00_EDGE巨集說明: B0BSET FP00IEN 其他巨集使用注意事項