Datasheet PE4259 (pSemi) - 6
| Manufacturer | pSemi |
| Description | SPDT High Power UltraCMOS 10 MHz–3.0 GHz RF Switch |
| Pages / Page | 10 / 6 — PE4259. Figure 6. Evaluation Board Schematic. Page 6 of 10 |
| File Format / Size | PDF / 575 Kb |
| Document Language | English |
PE4259. Figure 6. Evaluation Board Schematic. Page 6 of 10
Model Line for this Datasheet
Text Version of Document
PE4259
Product Specification
Figure 6. Evaluation Board Schematic
J4 J5 1 1 N/A N/A T-line Description -- Model = CPWG J7 H = 28 mils CNTL T = 2.1 mils W = 47 mils G = 30 mils 1 2 Er = 4.4 R2 1 K Ohm U1 J3 1 PE4259/SC70-6 RF2 4 3 CTRL RF_2 J1 1 5 2 RFC GND RFC 6 1 VDD RF_1 J2 1 1 RF1 C1 0.5pF 2 SEE ASSY NOTE 2 R1 1 K Ohm 1 C2 0.5pF General Comments 2 SEE ASSY NOTE 2 -- 1 2 Transmission lines connected to J1, J2, and J3 should have exactly the same electrical length. J6 CNTLX/VDD The path from J2 to J3 including the distance through the part should have the same length as J4 and J5 and be in parallel to J4 to J5. NOTES: DOC-30626 1. USE PCB PART NUMBER: 101-0162-02. 2. ADD TWO 0.5PF CAPS IN SERIES TO BE SHUNTED ON THE J1 SMA INPUT. SOLDER C1 SIDE 1 TO THE RF TRACE CLOSE TO THE J1 PIN. SOLDER C1 SIDE 2 TO C2 SIDE 1. SOLDER C2 SIDE 2 TO GROUND. ©2005-2023 pSemi Corporation All rights reserved. Document No. DOC-03694-5 │ UltraCMOS® RFIC Solutions
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Product Specification
Figure 6. Evaluation Board Schematic
J4 J5 1 1 N/A N/A T-line Description -- Model = CPWG J7 H = 28 mils CNTL T = 2.1 mils W = 47 mils G = 30 mils 1 2 Er = 4.4 R2 1 K Ohm U1 J3 1 PE4259/SC70-6 RF2 4 3 CTRL RF_2 J1 1 5 2 RFC GND RFC 6 1 VDD RF_1 J2 1 1 RF1 C1 0.5pF 2 SEE ASSY NOTE 2 R1 1 K Ohm 1 C2 0.5pF General Comments 2 SEE ASSY NOTE 2 -- 1 2 Transmission lines connected to J1, J2, and J3 should have exactly the same electrical length. J6 CNTLX/VDD The path from J2 to J3 including the distance through the part should have the same length as J4 and J5 and be in parallel to J4 to J5. NOTES: DOC-30626 1. USE PCB PART NUMBER: 101-0162-02. 2. ADD TWO 0.5PF CAPS IN SERIES TO BE SHUNTED ON THE J1 SMA INPUT. SOLDER C1 SIDE 1 TO THE RF TRACE CLOSE TO THE J1 PIN. SOLDER C1 SIDE 2 TO C2 SIDE 1. SOLDER C2 SIDE 2 TO GROUND. ©2005-2023 pSemi Corporation All rights reserved. Document No. DOC-03694-5 │ UltraCMOS® RFIC Solutions
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