Datasheet BUF802 (Texas Instruments) - 4
Manufacturer | Texas Instruments |
Description | Wide-Bandwidth, 2.3-nv/√hz, High-input Impedance Jfet Buffer |
Pages / Page | 38 / 4 — BUF802. www.ti.com. 6 Specifications 6.1 Absolute Maximum Ratings. MIN. … |
File Format / Size | PDF / 2.1 Mb |
Document Language | English |
BUF802. www.ti.com. 6 Specifications 6.1 Absolute Maximum Ratings. MIN. MAX. UNIT. 6.2 ESD Ratings. VALUE
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BUF802
SBOS998C – JUNE 2021 – REVISED MARCH 2022
www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VS = (VS+) – (VS–) Supply voltage(2) 14 V VSO = (VSO+) – (VSO–) Maximum dVS/dT for supply turn-on and turn-off 0.1 V/µs IN Input (VS+) to (VS–) – 0.5 V CLH Positive Clamp Mid-supply VS+ CLL Negative Clamp VS– Mid-supply V Input Clamp Diode 100 mA TJ Junction temperature 150 °C Tstg Storage temperature –65 150 °C (1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute maximum ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If briefly operating outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not sustain damage, but it may not be fully functional. Operating the device in this manner may affect device reliability, functionality, performance, and shorten the device lifetime. (2) VSO and VS should be tied to the same potential. VSO and VS are internally connected to each other through back to back diodes.
6.2 ESD Ratings VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000 V(ESD) Electrostatic discharge V Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Dual Supply voltage ±4.5 ±5 ±6.5 V VS = (VS+) – (VS–)(1) Single Supply voltage 9 10 13 V TA Ambient temperature –40 25 85 °C (1) BUF802 can be used with any possible combination of VS+ and VS– , provided the recommended operating condition is not exceeded
6.4 Thermal Information BUF802 THERMAL METRIC
(1)
RGT (VQFN) UNIT 16 PINS
RθJA Junction-to-ambient thermal resistance 53 °C/W RθJC(top) Junction-to-case (top) thermal resistance 61 °C/W RθJB Junction-to-board thermal resistance 27 °C/W ΨJT Junction-to-top characterization parameter 2.7 °C/W ΨJB Junction-to-board characterization parameter 27 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 13 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 4 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: BUF802 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics: Wide Bandwidth Mode 6.6 Electrical Characteristics: Low Quiescent Current Mode 6.7 Typical Characteristics 7 Parameter Measurement Information 8 Detailed Description 8.1 Overview 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 Input and Output Over-Voltage Clamp 8.3.2 Adjustable Quiescent Current 8.3.3 ESD Structure 8.4 Device Functional Modes 8.4.1 Buffer Mode (BF Mode) 8.4.2 Composite Loop Mode (CL Mode) 9 Application and Implementation 9.1 Application Information 9.2 Typical Application 9.2.1 Oscilloscope Front-End Amplifier Design 9.2.1.1 Design Requirements 9.2.1.2 Detailed Design Procedure 9.2.1.3 Application Curves 9.2.2 Transforming a Wide-Bandwidth, 50 Ω Input Signal Chain to High-Input Impedance 9.2.2.1 Detailed Design Results 9.2.2.2 Application Curves 10 Power Supply Recommendations 11 Layout 11.1 Layout Guidelines 11.2 Layout Example 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation 12.2 Receiving Notification of Documentation Updates 12.3 Support Resources 12.4 Trademarks 12.5 Electrostatic Discharge Caution 12.6 Glossary 13 Mechanical, Packaging, and Orderable Information