Datasheet AD8330 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Low Cost, DC to 150 MHz, Variable Gain Amplifier |
| Pages / Page | 32 / 9 — Data Sheet. AD8330. 6000. VDBS = 1.5V. OFST: ENABLED. DISABLED. f = 1MHz. … |
| Revision | H |
| File Format / Size | PDF / 1.4 Mb |
| Document Language | English |
Data Sheet. AD8330. 6000. VDBS = 1.5V. OFST: ENABLED. DISABLED. f = 1MHz. VDBS = 0.75V. 5000. ) 4000. √Hz. VDBS = 0V. 3000. RR (. ISE (n. O N 2000
Model Line for this Datasheet
Text Version of Document
Data Sheet AD8330 90 6000 VDBS = 1.5V OFST: ENABLED VDBS = 1.5V 80 DISABLED f = 1MHz VDBS = 0.75V 5000 70 60 ) 4000 50 B) √Hz d V/ 40 VDBS = 0V 3000 RR ( ISE (n CM 30 O N 2000 20 10 1000 0 –10 0
017
50k k 0 0 1 M 1 10M 10 M 0 0 . 0 5 1 0 . 1.5 2.0 2 5 .
020
FREQUENCY (Hz)
03217-
VMAG (V)
03217- Figure 16. CMRR vs. Frequency Figure 19. Output Referred Noise vs. VMAG
1500 80 V f = 1MHz T = +85°C MAG = 0.5V V f = 1MHz MAG = 0.5V 70 T = +25°C 1200 60 T = +85°C ) ) 50 √Hz 900 √Hz V/ V/ 40 T = –40°C T = +25°C ISE (n ISE (n O 600 O 30 N N T = –40°C 20 300 10 0 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
018
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
021
V V DBS (V)
03217-
DBS (V)
03217- Figure 17. Output Referred Noise vs. VDBS for Three Temperatures Figure 20. Input Referred Noise vs. VDBS for Three Temperatures
700 180 f = 1MHz f = 1MHz 160 600 140 500 VMAG = 0.125V ) ) 120 √Hz 400 √Hz V/ 100 V/ VMAG = 0.5V 80 ISE (n 300 ISE (n O O N N 60 200 40 100 20 VMAG = 2V 0 0 0 5 . 0 0 . 1 1.5 2.0 5 . 2
019
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
022
VMAG (V) V
03217-
DBS (V)
03217- Figure 18. Output Referred Noise vs. VMAG, Figure 21. Input Referred Noise vs. VDBS for Three Values of VMAG VDBS = 0.75 V Rev. G | Page 9 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Circuit Description Overall Structure Normal Operating Conditions Linear-in-dB Gain Control (VDBS) Inversion of the Gain Slope Gain Magnitude Control (VMAG) Two Classes of Variable Gain Amplifiers Amplitude/Phase Response Noise, Input Capacity, and Dynamic Range Dynamic Range Input Common-Mode Range and Rejection Ratio Output Noise and Peak Swing Offset Compensation Effects of Loading on Gain and AC Response Gain Errors Due to On-Chip Resistor Tolerances Output (Input) Common-Mode Control Using the AD8330 Gain and Swing Adjustments When Loaded Input Coupling DC-Coupled Signal Path Using Single-Sided Sources and Loads Pulse Operation Preserving Absolute Gain Calculation of Noise Figure Noise as a Function of VDBS Distortion Considerations P1dB and V1dB Applications Information ADC Driving Simple AGC Amplifier Wide Range True RMS Voltmeter Evaluation Board General Description Basic Operation Options Measurement Setup AD8330-EVALZ Board Design Outline Dimensions Ordering Guide
017
50k k 0 0 1 M 1 10M 10 M 0 0 . 0 5 1 0 . 1.5 2.0 2 5 .
020
FREQUENCY (Hz)
03217-
VMAG (V)
03217- Figure 16. CMRR vs. Frequency Figure 19. Output Referred Noise vs. VMAG
1500 80 V f = 1MHz T = +85°C MAG = 0.5V V f = 1MHz MAG = 0.5V 70 T = +25°C 1200 60 T = +85°C ) ) 50 √Hz 900 √Hz V/ V/ 40 T = –40°C T = +25°C ISE (n ISE (n O 600 O 30 N N T = –40°C 20 300 10 0 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
018
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
021
V V DBS (V)
03217-
DBS (V)
03217- Figure 17. Output Referred Noise vs. VDBS for Three Temperatures Figure 20. Input Referred Noise vs. VDBS for Three Temperatures
700 180 f = 1MHz f = 1MHz 160 600 140 500 VMAG = 0.125V ) ) 120 √Hz 400 √Hz V/ 100 V/ VMAG = 0.5V 80 ISE (n 300 ISE (n O O N N 60 200 40 100 20 VMAG = 2V 0 0 0 5 . 0 0 . 1 1.5 2.0 5 . 2
019
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
022
VMAG (V) V
03217-
DBS (V)
03217- Figure 18. Output Referred Noise vs. VMAG, Figure 21. Input Referred Noise vs. VDBS for Three Values of VMAG VDBS = 0.75 V Rev. G | Page 9 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Circuit Description Overall Structure Normal Operating Conditions Linear-in-dB Gain Control (VDBS) Inversion of the Gain Slope Gain Magnitude Control (VMAG) Two Classes of Variable Gain Amplifiers Amplitude/Phase Response Noise, Input Capacity, and Dynamic Range Dynamic Range Input Common-Mode Range and Rejection Ratio Output Noise and Peak Swing Offset Compensation Effects of Loading on Gain and AC Response Gain Errors Due to On-Chip Resistor Tolerances Output (Input) Common-Mode Control Using the AD8330 Gain and Swing Adjustments When Loaded Input Coupling DC-Coupled Signal Path Using Single-Sided Sources and Loads Pulse Operation Preserving Absolute Gain Calculation of Noise Figure Noise as a Function of VDBS Distortion Considerations P1dB and V1dB Applications Information ADC Driving Simple AGC Amplifier Wide Range True RMS Voltmeter Evaluation Board General Description Basic Operation Options Measurement Setup AD8330-EVALZ Board Design Outline Dimensions Ordering Guide
