Data SheetAD833800VOUT = 0.5V p-p–10–10Bc) –20d) –20cN (dBIO –30( –30RT OTIONT –40S–40HD3, MODE PIN LOWTORC DIIS–50NID –503ODHD3, MODE PIN HIGHIM–60HD2, MODE PIN LOW–60HARM–70–70HD2, MODE PIN HIGH–80–800.10.20.30.40.50.60.70.80.91.01.1 123 20k200k2M20M 124 VFREQUENCY (Hz)GAIN (V) 11279- 11279- Figure 22. Harmonic Distortion vs. VGAIN Figure 25. IMD3 Distortion vs. Frequency 202.0OUTPUTVOUT = 2V p-p f = 1MHz101.5GAIN = 0dB01.0Bm) d –10N (0.5IO S –20S(V)0REUTP –30OVM–0.5–40B CO 1dINPUT–1.0P –50–60–1.5–70–2.00.10.30.50.70.91.1 122 0100200300400500600700800 027 VGAIN (V)TIME (ns) 1279- 11279- 1 Figure 23. Input and Output 1 dB Compression vs. VGAIN Figure 26. Large Signal Pulse Response vs. Time, VGAIN = 0 V 252.0VOUT = 2V p-p f = 1MHz1.5GAIN = 80dB201.0100kHz0.515Bm) d(V)03 (UT OIPVO10–0.51MHz–1.05–1.50–2.00.10.30.50.70.91.1 028 125 00.20.40.60.8VTIME (µs) 1279- GAIN (V) 1 11279- Figure 24. OIP3 vs. VGAIN Figure 27. Large Signal Pulse Response vs. Time, VGAIN = 1.0 V Rev. A | Page 9 of 20 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications AC Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Introduction Overall Structure of the AD8338 VGA Core Normal Operating Conditions INPR, INMR, INPD, and INMD Pins FBKP, FBKM, OUTP, and OUTM Pins Linear-in-dB Gain Control, GAIN Pin Inversion of the Gain Slope, MODE Pin Offset Correction Circuit, OFSN Pin AGC Circuit, VAGC Pin Internal Reference, Pin VREF Explanation of the Gain Function Effects of Using External Resistors Adjusting The Output Common-Mode Voltage Applications Information Simple On-Off Keyed (OOK) Receiver Interfacing the AD8338 to an ADC Outline Dimensions Ordering Guide