Datasheet 74HC590 - 10
| Description | 8-bit binary counter with output register; 3-state |
| Pages / Page | 21 / 10 — NXP Semiconductors. 74HC590. 8-bit binary counter with output register; … |
| File Format / Size | PDF / 502 Kb |
| Document Language | English |
NXP Semiconductors. 74HC590. 8-bit binary counter with output register; 3-state. Table 7. Dynamic characteristics. Symbol
Model Line for this Datasheet
Text Version of Document
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NXP Semiconductors 74HC590 8-bit binary counter with output register; 3-state Table 7. Dynamic characteristics
…continued GND (ground = 0 V); for test circuit see Figure 15.
Symbol Parameter Conditions 25
°
C
−
40
°
C to +85
°
C
−
40
°
C to +125
°
C Unit Min Typ Max Min Max Min Max
th hold time CE to CPC; see Figure 13 VCC = 2.0 V 0 - - 0 - 0 - ns VCC = 4.5 V 0 - - 0 - 0 - ns VCC = 6.0 V 0 - - 0 - 0 - ns trec recovery time MRC to CPC; see Figure 11 VCC = 2.0 V 75 28 - 95 - 110 - ns VCC = 4.5 V 15 7 - 19 - 22 - ns VCC = 6.0 V 13 6 - 16 - 19 - ns fmax maximum CPC or CPR; see Figure 9 frequency and Figure 10 VCC = 2.0 V 6.6 16 - 5.2 - 4.4 - MHz VCC = 4.5 V 33 52 - 26 - 22 - MHz VCC = 6.0 V 39 61 - 31 - 26 - MHz C [4] PD power VI = GND to VCC - 44 - - - - - pF dissipation capacitance [1] tpd is the same as tPHL, tPLH. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPLZ and tPHZ. [4] CPD is used to determine the dynamic power dissipation (PD in µW). P 2 2 D = CPD × VCC × fi × N + ∑(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(C 2 L × VCC × fo) = sum of outputs. 74HC590_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 28 April 2009 10 of 21
Document Outline 1. General description 2. Features 3. Ordering information 4. Functional diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 6. Functional description 7. Limiting values 8. Recommended operating conditions 9. Static characteristics 10. Dynamic characteristics 11. Waveforms 12. Package outline 13. Abbreviations 14. Revision history 15. Legal information 15.1 Data sheet status 15.2 Definitions 15.3 Disclaimers 15.4 Trademarks 16. Contact information 17. Contents
NXP Semiconductors 74HC590 8-bit binary counter with output register; 3-state Table 7. Dynamic characteristics
…continued GND (ground = 0 V); for test circuit see Figure 15.
Symbol Parameter Conditions 25
°
C
−
40
°
C to +85
°
C
−
40
°
C to +125
°
C Unit Min Typ Max Min Max Min Max
th hold time CE to CPC; see Figure 13 VCC = 2.0 V 0 - - 0 - 0 - ns VCC = 4.5 V 0 - - 0 - 0 - ns VCC = 6.0 V 0 - - 0 - 0 - ns trec recovery time MRC to CPC; see Figure 11 VCC = 2.0 V 75 28 - 95 - 110 - ns VCC = 4.5 V 15 7 - 19 - 22 - ns VCC = 6.0 V 13 6 - 16 - 19 - ns fmax maximum CPC or CPR; see Figure 9 frequency and Figure 10 VCC = 2.0 V 6.6 16 - 5.2 - 4.4 - MHz VCC = 4.5 V 33 52 - 26 - 22 - MHz VCC = 6.0 V 39 61 - 31 - 26 - MHz C [4] PD power VI = GND to VCC - 44 - - - - - pF dissipation capacitance [1] tpd is the same as tPHL, tPLH. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPLZ and tPHZ. [4] CPD is used to determine the dynamic power dissipation (PD in µW). P 2 2 D = CPD × VCC × fi × N + ∑(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(C 2 L × VCC × fo) = sum of outputs. 74HC590_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 28 April 2009 10 of 21
Document Outline 1. General description 2. Features 3. Ordering information 4. Functional diagram 5. Pinning information 5.1 Pinning 5.2 Pin description 6. Functional description 7. Limiting values 8. Recommended operating conditions 9. Static characteristics 10. Dynamic characteristics 11. Waveforms 12. Package outline 13. Abbreviations 14. Revision history 15. Legal information 15.1 Data sheet status 15.2 Definitions 15.3 Disclaimers 15.4 Trademarks 16. Contact information 17. Contents
