Datasheet ADA4950-1/ADA4950-2 (Analog Devices) - 3

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Data Sheet ADA4950-1/ADA4950-2 SPECIFICATIONS ±5 V OPERATION
TA = 25°C, +VS = 5 V, −VS = −5 V, VOCM = 0 V, G = 1, RT = 53.6 Ω (when used), RL, dm = 1 kΩ, unless otherwise noted. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Refer to Figure 52 for signal definitions.
Differential Inputs to VOUT, dm Performance Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Small-Signal Bandwidth VOUT, dm = 0.1 V p-p 750 MHz −3 dB Large-Signal Bandwidth VOUT, dm = 2.0 V p-p 350 MHz Bandwidth for 0.1 dB Flatness VOUT, dm = 2.0 V p-p, RL = 200 Ω ADA4950-1 210 MHz ADA4950-2 230 MHz Slew Rate VOUT, dm = 2 V p-p, 25% to 75% 2900 V/µs Settling Time to 0.1% VOUT, dm = 2 V step 9 ns Overdrive Recovery Time VIN = 0 V to 5 V ramp, G = 2 20 ns NOISE/HARMONIC PERFORMANCE See Figure 51 for distortion test circuit Second Harmonic VOUT, dm = 2 V p-p 1 MHz −108 dBc 10 MHz −107 dBc 20 MHz −98 dBc 50 MHz −80 dBc Third Harmonic VOUT, dm = 2 V p-p 1 MHz −126 dBc 10 MHz −105 dBc 20 MHz −99 dBc 50 MHz −84 dBc IMD3 f1 = 30 MHz, f2 = 30.1 MHz, VOUT, dm = 2 V p-p −94 dBc Voltage Noise (Referred to Output) f = 1 MHz Gain = 1 9.2 nV/√Hz Gain = 2 12.5 nV/√Hz Gain = 3 16.6 nV/√Hz Crosstalk (ADA4950-2) f = 10 MHz; Channel 2 active, Channel 1 −87 dB output INPUT CHARACTERISTICS Offset Voltage (Referred to Input) V+DIN = V−DIN = VOCM = 0 V −2.5 ±0.2 +2.5 mV TMIN to TMAX variation –3.7 µV/°C Input Capacitance Single-ended at package pin 0.5 pF Input Common-Mode Voltage Range Directly at internal amplifier inputs, not −VS + 0.2 to V external input terminals +VS − 1.8 CMRR DC, ∆VOUT, dm/∆VIN, cm, ∆VIN, cm = ±1 V −64 −49 dB Open-Loop Gain 64 66 dB OUTPUT CHARACTERISTICS Output Voltage Swing Maximum ∆VOUT, single-ended output, –VS + 1.4 to −VS + 1.2 to V RL = 1 kΩ +VS – 1.4 +VS − 1.2 Linear Output Current 200 kHz, RL, dm = 10 Ω, SFDR = 69 dB 114 mA peak Output Balance Error ∆VOUT, cm/∆VOUT, dm, ∆VOUT, dm = 2 V p-p, 1 MHz; −62 dB see Figure 50 for output balance test circuit Gain Error Gain = 1 0.5 1.2 % Gain = 2 1.0 1.9 % Gain = 3 0.8 1.7 % Rev. B | Page 3 of 26 Document Outline Features Applications General Description Functional Block Diagrams Table of Contents Revision History Specifications ±5 V Operation Differential Inputs to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance 5 V Operation Differential Inputs to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Theory of Operation Applications Information Analyzing an Application Circuit Selecting the Closed-Loop Gain Estimating the Output Noise Voltage Calculating the Input Impedance for an Application Circuit Terminating a Single-Ended Input Input Common-Mode Voltage Range Input and Output Capacitive AC Coupling Input Signal Swing Considerations Setting the Output Common-Mode Voltage Layout, Grounding, and Bypassing High Performance ADC Driving Outline Dimensions Ordering Guide