Datasheet 74HC4053, 74HCT4053 (NXP) - 4
| Manufacturer | NXP |
| Description | Triple 2-channel analog multiplexer/demultiplexer |
| Pages / Page | 31 / 4 — NXP Semiconductors. 74HC4053; 74HCT4053. Triple 2-channel analog … |
| File Format / Size | PDF / 334 Kb |
| Document Language | English |
NXP Semiconductors. 74HC4053; 74HCT4053. Triple 2-channel analog multiplexer/demultiplexer. 6. Pinning. information. 6.1 Pinning
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NXP Semiconductors 74HC4053; 74HCT4053 Triple 2-channel analog multiplexer/demultiplexer 6. Pinning information 6.1 Pinning +& +&7
WHUPLQDO && < 9
+&
LQGH[DUHD
+&7
< = < 9 < = && < = = < < = < < = < ( 9&& 6 < < 9(( 6 ( 6 9(( 6 6 *1' 6 DDH *1' DDH 7UDQVSDUHQWWRSYLHZ (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to VCC.
Fig 5. Pin configuration SO16, and (T)SSOP16 Fig 6. Pin configuration DHVQFN16 6.2 Pin description Table 2. Pin description Symbol Pin Description
E 6 enable input (active LOW) VEE 7 supply voltage GND 8 ground supply voltage S1, S2, S3 11, 10, 9 select input 1Y0, 2Y0, 3Y0 12, 2, 5 independent input or output 1Y1, 2Y1, 3Y1 13, 1, 3 independent input or output 1Z, 2Z, 3Z 14, 15, 4 common output or input VCC 16 supply voltage 74HC_HCT4053 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 9 — 10 February 2016 4 of 31
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Functional diagram 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 11. Dynamic characteristics 11.1 Additional dynamic characteristics 12. Package outline 13. Abbreviations 14. Revision history 15. Legal information 15.1 Data sheet status 15.2 Definitions 15.3 Disclaimers 15.4 Trademarks 16. Contact information 17. Contents
WHUPLQDO && < 9
+&
LQGH[DUHD
+&7
< = < 9 < = && < = = < < = < < = < ( 9&& 6 < < 9(( 6 ( 6 9(( 6 6 *1' 6 DDH *1' DDH 7UDQVSDUHQWWRSYLHZ (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to VCC.
Fig 5. Pin configuration SO16, and (T)SSOP16 Fig 6. Pin configuration DHVQFN16 6.2 Pin description Table 2. Pin description Symbol Pin Description
E 6 enable input (active LOW) VEE 7 supply voltage GND 8 ground supply voltage S1, S2, S3 11, 10, 9 select input 1Y0, 2Y0, 3Y0 12, 2, 5 independent input or output 1Y1, 2Y1, 3Y1 13, 1, 3 independent input or output 1Z, 2Z, 3Z 14, 15, 4 common output or input VCC 16 supply voltage 74HC_HCT4053 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 9 — 10 February 2016 4 of 31
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 5. Functional diagram 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description 8. Limiting values 9. Recommended operating conditions 10. Static characteristics 11. Dynamic characteristics 11.1 Additional dynamic characteristics 12. Package outline 13. Abbreviations 14. Revision history 15. Legal information 15.1 Data sheet status 15.2 Definitions 15.3 Disclaimers 15.4 Trademarks 16. Contact information 17. Contents
