120Mhz MIPS32 microAptiv MCU Core Floating Point Unit for single and double precision math MicroMIPS Mode for 40% smaller code size DSP-Enhanced Core: Four 64-bit Accumulators Single Cycle MAC supporting saturating and fractional math
120Mhz MIPS32 microAptiv MCU Core Floating Point Unit for single and double precision math MicroMIPS Mode for 40% smaller code size DSP-Enhanced Core: Four 64-bit Accumulators Single Cycle MAC supporting saturating and fractional math
120Mhz MIPS32 microAptiv MCU Core Floating Point Unit for single and double precision math MicroMIPS Mode for 40% smaller code size DSP-Enhanced Core: Four 64-bit Accumulators Single Cycle MAC supporting saturating and fractional math
120Mhz MIPS32 microAptiv MCU Core Floating Point Unit for single and double precision math MicroMIPS Mode for 40% smaller code size DSP-Enhanced Core: Four 64-bit Accumulators Single Cycle MAC supporting saturating and fractional math
120Mhz MIPS32 microAptiv MCU Core Floating Point Unit for single and double precision math MicroMIPS Mode for 40% smaller code size DSP-Enhanced Core: Four 64-bit Accumulators Single Cycle MAC supporting saturating and fractional math
120Mhz MIPS32 microAptiv MCU Core Floating Point Unit for single and double precision math MicroMIPS Mode for 40% smaller code size DSP-Enhanced Core: Four 64-bit Accumulators Single Cycle MAC supporting saturating and fractional math