Datasheet Texas Instruments SN74S74N3
| Manufacturer | Texas Instruments |
| Series | SN74S74 |
| Part Number | SN74S74N3 |
Dual D-Type Positive-Edge-Triggered Flip-Flops With Preset And Clear 14-PDIP 0 to 70
Datasheets
Dual D-Type Positive-Edge -Triggered Flip-Flops With Preset And Clear datasheet
PDF, 1.4 Mb, File published: Mar 1, 1988
Extract from the document
Prices
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 14 |
| Package Type | N |
| Industry STD Term | PDIP |
| JEDEC Code | R-PDIP-T |
| Width (mm) | 6.35 |
| Length (mm) | 19.3 |
| Thickness (mm) | 3.9 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Download |
Parametrics
| 3-State Output | No |
| Approx. Price (US$) | 0.57 | 1ku |
| Bits(#) | 2 |
| F @ Nom Voltage(Max)(Mhz) | 50 |
| ICC @ Nom Voltage(Max)(mA) | 25 |
| Input Type | TTL |
| Operating Temperature Range(C) | 0 to 70 |
| Output Drive (IOL/IOH)(Max)(mA) | 20/-1 |
| Output Type | TTL |
| Package Group | PDIP |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | S |
| VCC(Max)(V) | 5.25 |
| VCC(Min)(V) | 4.75 |
| Voltage(Nom)(V) | 5 |
| tpd @ Nom Voltage(Max)(ns) | 9 |
Eco Plan
| RoHS | Not Compliant |
| Pb Free | No |
Model Line
Series: SN74S74 (5)
- SN74S74D SN74S74N SN74S74N3 SN74S74NE4 SN74S74NSR
Manufacturer's Classification
- Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop
