Datasheet Texas Instruments ADC08D500CIYB

ADC08D500
www.ti.com SNAS274F – MAY 2005 – REVISED APRIL 2013 ADC08D500 High Performance, Low Power, Dual 8-Bit, 500 MSPS A/D Converter
Check for Samples: ADC08D500 FEATURES DESCRIPTION The ADC08D500 is a dual, low power, high
performance CMOS analog-to-digital converter that
digitizes signals to 8 bits resolution at sampling rates
up to 500 MSPS. Consuming a typical 1.4 Watts at
500 MSPS from a single 1.9 Volt supply, this device
is ensured to have no missing codes over the full
operating temperature range. The unique folding and
interpolating architecture, the fully differential
comparator design, the innovative design of the
internal sample-and-hold amplifier and the selfcalibration scheme enable a very flat response of all
dynamic parameters beyond Nyquist, producing a
high 7.5 ENOB with a 250 MHz input signal and a
500 MHz sample rate while providing a 10-18 B.E.R.
Output formatting is offset binary and the LVDS
digital outputs are compatible with IEEE 1596.3-1996,
with the exception of an adjustable common mode
voltage between 0.8V and 1.2V. 1 2 Internal Sample-and-Hold
Single +1.9V В±0.1V Operation
Choice of SDR or DDR Output Clocking
Interleave Mode for 2x Sampling Rate
Multiple ADC Synchronization Capability …