Datasheet Texas Instruments SN74LVT543
| Manufacturer | Texas Instruments |
| Series | SN74LVT543 |
3.3-V ABT Octal Registered Transceivers With 3-State Outputs
Datasheets
3.3-V ABT Octal Registered Transceivers With 3-State Outputs datasheet
PDF, 190 Kb, Revision: D, File published: Jul 1, 1995
Extract from the document
Prices
Status
| SN74LVT543DBLE | SN74LVT543DW | SN74LVT543NSR | SN74LVT543PWLE | |
|---|---|---|---|---|
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) | NRND (Not recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No | No | No | No |
Packaging
| SN74LVT543DBLE | SN74LVT543DW | SN74LVT543NSR | SN74LVT543PWLE | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 24 | 24 | 24 | 24 |
| Package Type | DB | DW | NS | PW |
| Industry STD Term | SSOP | SOIC | SOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Width (mm) | 5.3 | 7.5 | 5.3 | 4.4 |
| Length (mm) | 8.2 | 15.4 | 15 | 7.8 |
| Thickness (mm) | 1.95 | 2.35 | 1.95 | 1 |
| Pitch (mm) | .65 | 1.27 | 1.27 | .65 |
| Max Height (mm) | 2 | 2.65 | 2 | 1.2 |
| Mechanical Data | Download | Download | Download | Download |
| Package QTY | 25 | |||
| Carrier | TUBE | |||
| Device Marking | LVT543 |
Eco Plan
| SN74LVT543DBLE | SN74LVT543DW | SN74LVT543NSR | SN74LVT543PWLE | |
|---|---|---|---|---|
| RoHS | Not Compliant | Compliant | Not Compliant | Not Compliant |
| Pb Free | No | No | No |
Application Notes
- LVT Family Characteristics (Rev. A)PDF, 98 Kb, Revision: A, File published: Mar 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Kb, File published: Dec 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
Model Line
Series: SN74LVT543 (4)
Manufacturer's Classification
- Semiconductors> Logic> Buffer/Driver/Transceiver> Registered Transceiver
