Datasheet Texas Instruments TDA2SX
Manufacturer | Texas Instruments |
Series | TDA2SX |
![Datasheet Texas Instruments TDA2SX](http://www.ti.com/graphics/folders/partimages/TDA2SX.jpg)
SoC Processor w/ Full-featured Graphics, Video & Vision Acceleration for ADAS Applications
Datasheets
TDA2x ADAS Applications Processor 23mm Package (ABC Package) Silicon Revision 2.0 datasheet
PDF, 6.4 Mb, Revision: C, File published: Jun 6, 2017
Extract from the document
Prices
Status
TDA2SXBTQABCQ1 | TDA2SXBTQABCRQ1 | |
---|---|---|
Lifecycle Status | Preview (Device has been announced but is not in production. Samples may or may not be available) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No |
Packaging
TDA2SXBTQABCQ1 | TDA2SXBTQABCRQ1 | |
---|---|---|
N | 1 | 2 |
Pin | 760 | 760 |
Package Type | ABC | ABC |
Industry STD Term | FCBGA | FCBGA |
JEDEC Code | S-PBGA-N | S-PBGA-N |
Width (mm) | 23 | 23 |
Length (mm) | 23 | 23 |
Thickness (mm) | 2.39 | 2.39 |
Pitch (mm) | .8 | .8 |
Max Height (mm) | 2.96 | 2.96 |
Mechanical Data | Download | Download |
Package QTY | 250 | |
Carrier | JEDEC TRAY (5+1) | |
Device Marking | TDA |
Parametrics
Parameters / Models | TDA2SXBTQABCQ1![]() | TDA2SXBTQABCRQ1![]() |
---|---|---|
ARM CPU | 2 ARM Cortex-A15 | 2 ARM Cortex-A15 |
ARM MHz, Max. | 1176 | |
ARM MHz (Max.) | 1176 | |
CAN(#) | 2 | |
CSI-2 | N/A | |
Co-Processor, s | 4 ARM Cortex-M4 | |
Co-Processor(s) | 2 ARM Cortex-M4 | |
DSP | 2 C66x | 2 C66x |
DSP MHz, Max. | 750 | |
DSP MHz (Max.) | 750 | |
Display Options | 1 HDMIOUT 3 LCD OUT | 1 HDMIOUT,3 LCD OUT |
EMAC | 2-port 1Gb switch 10/100/1000 | 10/100/1000,2-port 1Gb switch |
EMIF | 2 DDR2 2 DDR3 2 DDR3L | 2 DDR2,2 DDR3,2 DDR3L |
EMIF Speed | DDR2-800 DDR3-1066 | |
EVE MHz | 650 | |
Embedded Vision Engine, EVE | 4 | |
Embedded Vision Engine (EVE), Max | 4 | 650 |
GPIO | 247 | |
Graphics Acceleration | 1 2D 2 3D | 1 2D,2 3D |
Hardware Accelerators | 1 Image Video Accelerator 2 Viterbi Decoder Audio Tracking | 1 Image Video Accelerator,2 Viterbi Decoder,Audio Tracking |
I2C | 5 | |
MMC/SD | 1x UHSI 4b 1x eMMC 8b 1x SDIO 8b 1x SDIO4b | 1x SDIO 4b,1x SDIO 8b,1x UHSI 4b,1x eMMC 8b |
McASP | 8 | 8 |
Other On-Chip Memory | 2.5 MB | 2.5 MB |
PCIe | 2 PCIe Gen2 | 2 PCIe Gen3 |
Package Group | FCBGA | |
Package Size: mm2:W x L (PKG) | See datasheet (FCBGA) | |
Pin/Package | 760FCBGA | |
QSPI | 1 | |
Rating | Automotive | |
SATA | 1 | |
SPI | 4 | |
Serial I/O | I2C UART CAN SPI USB | I2C,UART,CAN,SPI,USB |
UART | 10 | |
Video Input Ports | 10 | 10 |
Watchdog Timers | 1 |
Eco Plan
TDA2SXBTQABCQ1 | TDA2SXBTQABCRQ1 | |
---|---|---|
RoHS | Not Compliant | Compliant |
Pb Free | No |
Application Notes
- Quad Channel Camera Application for Surround View and CMS Camera Systems (Rev. A)PDF, 485 Kb, Revision: A, File published: Aug 23, 2016
This application report discusses in detail a reference design jointly developed between OmniVision Technologies, Inc. and Texas Instruments, Inc. It interconnects Megapixel Image Sensors with the TDA2x ADAS Applications Processor. In order to bridge long distances over coax cables, TI's FPD-Link III technology comes into play. The concept proves a method over which continuous high speed transfers - DSS BT656 Workaround for TDA2xPDF, 141 Kb, File published: Mar 29, 2016
- TDA2x/TDA2E PerformancePDF, 6.6 Mb, File published: Jul 19, 2016
This application report provides information on the TDA2xx and TDA2ex device throughput performances and describes the TDA2xx and TDA2ex System-on-Chip (SoC) architecture, data path infrastructure, and constraints that affect the throughput and different optimization techniques for optimum system performance. This document also provides information on the maximum possible throughput performance of - ADAS Power ManagementPDF, 1.3 Mb, File published: Mar 7, 2016
- DSS Bit Exact OutputPDF, 115 Kb, File published: Jan 11, 2016
The display subsystem (DSS) in TDA2xx, TDA2Ex and TDA3xx platform is used for displaying video data to external devices. But DSS can also be used as a high-speed data transfer port for any non video data. One of the basic requirements of the data transfer port is that the data that is present in the memory should not be modified before the data is sent out, which means the data sent should be bit - ECC/EDC on TDAxx (Rev. A)PDF, 109 Kb, Revision: A, File published: Jul 5, 2017
TDA2x and TDA3x series of automotive processor are designed to be used in automotive safety systems. To enable safety, these processors come with error detection and correction (EDC) support for various memories. This application report provides an overview and usage description of EDC. - Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A)PDF, 148 Kb, Revision: A, File published: Dec 15, 2016
This application report lists various quality-of-service (QoS) knobs that are implemented in DRA74x, DRA75x and TDA2x system-on-chip (SoC) family of devices. These QoS knobs aid to optimize overall system performance while running several concurrent application scenarios. - Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x DevicePDF, 612 Kb, File published: Aug 13, 2014
This application report provides a methodology through which performance issues can be identified and fixed in systems using DRA74x, DRA75x, TDA2x and TDA3x family of devices. - A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. A)PDF, 3.2 Mb, Revision: A, File published: Aug 19, 2016
Being able to look into the state of the device when an application fails to run as expected is a key enabler while debugging the application. This application report walks through the different steps required to setup the TI Code Composer Studioв„ў (CCS), as well as how to debug applications on the DRA7x, TDA2x and TDA3x family of devices. The document starts with describing basic CCS debugging tec
Model Line
Series: TDA2SX (2)
Manufacturer's Classification
- Semiconductors> Processors> Automotive Processors> TDAx ADAS SoCs