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Datasheet Texas Instruments TLV2548M

Manufacturer:Texas Instruments
Series:TLV2548M

12-Bit 200 kSPS ADC Ser. Out, Auto Pwrdn (S/W and H/W), Low Power W/8 x FIFO W/8 Ch.

Datasheets

  • Download » Datasheet, PDF, 1.6 Mb, Revision: F, 10-07-2009
    3-V to 5.5-V, 12-Bit, 200-KSPS, 4-/8-Channel, Low-Power Serial Analog-to-Digital datasheet (Rev. F)

Family: TLV2544Q, TLV2548M, TLV2548Q

Status

 5962-9957001Q2ATLV2548MFKB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNo

Packaging

 5962-9957001Q2ATLV2548MFKB
Pin2020
Package TypeFKFK
Industry STD TermLCCCLCCC
JEDEC CodeS-CQCC-NS-CQCC-N
Package QTY11
CarrierTUBETUBE
Device Marking5962-TLV2548
Width (mm)8.898.89
Length (mm)8.898.89
Thickness (mm)1.831.83
Pitch (mm)1.271.27
Max Height (mm)2.032.03
Mechanical DataDownload »Download »

Parametrics

 5962-9957001Q2ATLV2548MFKB
# Input Channels88
Analog Voltage AVDD(Max)(V)5.55.5
Analog Voltage AVDD(Min)(V)33
ArchitectureSARSAR
Digital Supply(Max)(V)5.55.5
Digital Supply(Min)(V)33
ENOB(Bits)11.611.6
INL(Max)(+/-LSB)1.21.2
InterfaceSPISPI
Operating Temperature Range(C)-55 to 125-55 to 125
Package GroupLCCCLCCC
Package Size: mm2:W x L (PKG)20LCCC: 79 mm2: 8.89 x 8.89(LCCC)See datasheet (CDIP)
Power Consumption(Typ)(mW)3.33.3
RatingMilitaryMilitary
Reference ModeExt
Int
Ext
Int
Resolution(Bits)1212
SFDR(dB)8484
SNR(dB)7070
Sample Rate (max)(SPS)200kSPS200kSPS

Eco Plan

 5962-9957001Q2ATLV2548MFKB
RoHSSee ti.comTBD
Pb FreeSee ti.comNo

Manufacturer's Classification

  • Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters

Application Notes

  • Download » Application Notes, PDF, 227 Kb, Revision: A, 11-10-2010
    Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Download » Application Notes, PDF, 215 Kb, 03-17-2011
    Determining Minimum Acquisition Times for SAR ADCs, part 2
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

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