Datasheet Texas Instruments TMS320C40

ManufacturerTexas Instruments
SeriesTMS320C40

Digital Signal Processors

Datasheets

Digital Signal Processor datasheet
PDF, 693 Kb, File published: Jan 1, 1996
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Prices

Status

TMS320C40GFL60
Lifecycle StatusNRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

TMS320C40GFL60
N1
Pin325
Package TypeGF
Industry STD TermCPGA
JEDEC CodeS-CPGA-P
Package QTY1
Device Marking@1991 TI
Width (mm)47.25
Length (mm)47.25
Thickness (mm)3.62
Pitch (mm)1.27
Max Height (mm)5.59
Mechanical DataDownload

Eco Plan

TMS320C40GFL60
RoHSSee ti.com

Application Notes

  • Predator: A Posture Tracking System
    PDF, 138 Kb, File published: Aug 1, 1997
    The fields of telepresence and virtual reality have experienced a surge of activity in recent years. The goal of these fields is to place users in an immersive environment that behaves like the real world. To achieve this goal, fields require the use of next-generation input devices such as data gloves, head-mounted displays, and various other immersive peripherals. Posture capture and recognition
  • Creating an Interactive Simulation Environment Using TMS320C40 Multi-DSP System
    PDF, 322 Kb, File published: Jul 1, 1997
    This application report describes a real-time high performance simulation environment using the Texas Instruments (TI(TM)) TMS320C40 digital signal processor (DSP). The interactive simulation environment provides a diagnostic system for measuring, sampling, and diagnosing actual technical processes.The real-time diagnosis of hardware errors reduces the investigative time required to identify e
  • A Parallel Approach for Matrix Multiplication on the TMS320C4x DSP
    PDF, 96 Kb, File published: Feb 1, 1994
    Matrix multiplication used in areas such as graph theory, numerical algorithms, signal processing, and digital control, requires the high computational throughput provided by parallel processing. This document describes the fundamentals of matrix multiplication and parallel processing. It shows using the 32-bit floating-point TMS320C4x parallel digital signal processor to perform matrix multiplica
  • Designing With TMS320C40 Comm Ports: Part 1
    PDF, 81 Kb, File published: Jun 1, 1997
    The TMS320C40 communication port is a very-high-speed data transmission circuit. Its speed and the close proximity of multiple data lines create special challenges. The information in this document is intended to help you past some of the potential problem areas. It discusses some design issues, and gives tips to use when designing with TMS320C40 communication ports. Several schematic diagrams are
  • A Simple Way to Terminate Unused TMS320C40 Comm Ports
    PDF, 29 Kb, File published: Jun 1, 1997
    This document discusses an easy way to terminate an unused communication (comm) port without using external pull-up resistors.
  • Parallelizing and Optimizing a Simulator Kernel on a Multi-DSP Architecture
    PDF, 137 Kb, File published: Jul 1, 1997
    This application report describes the parallelization and optimization of a hydraulic simulator kernel on a Texas Instruments (TI?) TMS320C40 multi-DSP (digital signal processor) platform. Research is based on A. Riel's diploma thesis. This report includes references to works directly connected with this thesis. Three different parallel versions of the initially sequential simulator are implem
  • Developing a Real-Time Person Tracking System Using the TMS320C40 DSP
    PDF, 360 Kb, File published: Apr 1, 1997
    This application report describes the development of a real time system for tracking a walking person using a high-speed image processor and an active camera head. The image processor is composed of five digital signal processing (DSP) boards. Each DSP board includes two Texas Instruments (TI(TM)) TMS320C40 DSPs that communicate with each other through the communication ports and perform various i
  • A Hardware Monitor Using TMS320C40 Analysis Module & JTAG for Perf Measurements
    PDF, 539 Kb, File published: Jul 1, 1997
    This application report describes the design and implementation of a hardware monitor that provides information from the processor level up to the application level. It uses the on-chip analysis module of the Texas Instruments (TI(TM)) TMS320C40 digital signal processor (DSP) and a boundary-scan technique according to the IEEE 1149.1 JTAG-standard. The monitor can be used for both single processor
  • A Global Visibility Classifier Based on a Multi-DSP System
    PDF, 226 Kb, File published: Jul 1, 1997
    We present a classification algorithm for determination of global visibility relations. Results allow us to characterize visibility between any two points in 3D visibility space. Parallelism of computations is detected by data dependence analysis and leads to a parallel program. An experimental implementation of the classifier on a multi-DSP system (6 TMS320C40) is presented. Finally we discuss ef
  • Video Restoration on a Multiple TMS320C40 System
    PDF, 1.3 Mb, File published: Nov 1, 1996
    This document describes a parallel video restoration system for restoring old motion picture archives. A Gaussian-weighted, bi-directional 3-D auto-regressive (B3D-AR) algorithm is used to alleviate the presence of noise. The equations implemented by the system are presented. Parallel implementation and load balancing on an array of fifteen TMS320C40 parallel floating-point digital signal processo
  • Implementing a Digital Tracker for Monopulse Radar Using the TMS320C40 DSP
    PDF, 81 Kb, File published: Jul 1, 1997
    This project AXIR_B (Digital Tracker) corresponds to a PCB that performs the following main tasks.- Deviation calculus and coordinates transformations.- Tracking and smoothing the rectangular (X, Y, Z) coordinates.- Interfacing with the pedestal and the Radar Manager.The Digital Tracker operates different algorithms during the three modes of the AXIR. The three modes of the AXIR ra
  • Parallel 1-D FFT Implementation With TMS320C4x DSPs
    PDF, 278 Kb, File published: Feb 1, 1994
    This document discusses the theory of one-dimensional fast Fourier transforms (1-D FFT), parallel 1-D FFT, and parallel decimation in frequency (DIF) FFT algorithms. Two schemes are presented for the parallel DIF FFT algorithm along with a discussion of partitioned 1-D FFT. An implementation of 1-D FFT using the TMS320C40 parallel processing development system (PPDS) is shown. The TMS320C40 is a 3
  • TMS320C40 Emulator TIPs
    PDF, 43 Kb, File published: Jun 1, 1997
    This document discusses special precautions that need to be taken when working with the TMS320C40 emulator. There are several potential problem situations:? The debugger will break any pending CPU/DMA access that is not completed within the time-out period. ? Comm port logic stops when the emulator is halting the device (in a breakpoint or between single steps). (However, you can still wor
  • Parallel Digital Signal Processing: An Emerging Market
    PDF, 93 Kb, File published: Feb 1, 1994
    Three key factors in parallel processing are interprocessor communication, parallel debugging, and parallel programming. This document provides an overview of digital signal processing markets, on-chip versus off-chip parallel processing, software development, and emulation for the TMS320C40 32-bit floating-point digital signal processor (DSP).
  • Prototyping the TI TMS320C40 to the Cypress VIC068/VAC068 VME Interface
    PDF, 169 Kb, File published: Feb 1, 1994
    The VIC068/VA068 is designed to interface with the Motorola 68000 microprocessor family, so interfacing it to the TMS320C40 digital signal processor (DSP) requires a logic simulation or configurable prototype. This document focuses on the details of the hardware design and the programmable logic source code interfacing the VIC068 to the TMS320C40 32-bit parallel DSP. It provides the details on the
  • EDRAM Controller for the 60MHz TMS320C40 DSP
    PDF, 150 Kb, File published: Jul 1, 1997
    The popular Texas Instruments (TI*) TMS320C4X family of 32-bit floating-point digital signal processors (DSPs) has a memory bus that operates at 30 MHz. The 32-bit local external memory bus supports a maximum read bandwidth of 120 Mbytes per second and a maximum write bandwidth of 60 Mbytes per second. The processor has two on-board programmable timers to simplify the generation of a refresh clock
  • Optical Quality Assurance With Parallel Processors
    PDF, 152 Kb, File published: Feb 1, 1996
    One advantage of parallel processors (PPs) is that their performance is made scaleable by the addition of more processors to the system. Interprocesor communication is guaranteed by high-speed interfaces that transfer data independent of the CPU. This document shows a TMS320C40 32-bit floating-point parallel digital signal processor used in an industrial environment application to ensure the quali
  • TMS320C40 Boot Loader Selection
    PDF, 49 Kb, File published: Jun 1, 1997
    The TMS320C40 includes a boot loader to allow users to load and execute programs from a host processor, inexpensive ROM, or other standard memory devices. This document discusses how to select the boot loader and how to use it. A schematic is included.
  • Implementing a Real-Time Application on a TMS320C40 Multi-DSP
    PDF, 46 Kb, File published: Jul 1, 1997
    This application report describes a method for real-time processing of images captured using a CCD (charge-coupled device) video camera using the Texas Instruments (TITM) TMS320C4x digital signal processor (DSP). The TI TMS320C4x is one of five generations of digital signal processors in the TI TMS320 family. The parallel processing ability of the TI TMS320C4x supplies the necessary performanc
  • A Novel Way of Using TMS320C40 Cache
    PDF, 38 Kb, File published: Jun 1, 1997
    This document discusses how to place any value into the TMS320C40 cache. A code example is included.
  • 'AMELIA' - An A/D-D/A Interface to the TMS320C40 Global Bus
    PDF, 60 Kb, File published: Feb 1, 1994
    AMELIA, Loughborough Sound Images Analog ModuleE Link Interface Adapter, provides a modular analog interface to the 32-bit floating-point TMS320C40 DSP. This document provides design techniques, pin assignments, circuit connections, and a programming interface for AMELIA. An assembler code echo program is provided. The basis of this paper is the ADC and DAC conversion, but other communication prot
  • TMS320C40 DMA Memory Transfer Timing
    PDF, 50 Kb, File published: Jun 1, 1997
    This document discusses how many cycles it takes the DMA to read/write to external memory. Several tables are given to allow the developer to determine this information for several different types of configurations.
  • Fast Logarithms on a Floating-Point Device
    PDF, 66 Kb, File published: Jun 1, 1997
    This document discusses a fast way to calculate logarithms (base 2) on a TMS320C30 or TMS320C40. This TMS320C30/C40 function calculates the log base two of a number in about half the time of conventional algorithms. The method can easily be scaled for faster execution if less accuracy is desired. The mathematics of the function is discussed in detail. There are plots to determine accuracy at diffe
  • Implementing Continuously Programmable Digital Filters w/ TMS320C30/40 DSP (Rev. A)
    PDF, 191 Kb, Revision: A, File published: Aug 1, 1997
    Systems engineers must apply real-time digital hardware solutions to signal processing problems to achieve the goals of reliability, repeatability, and flexibility. DSP offers the only such solution for many applications. Digital filter components are an integral part of many DSP systems. In particular, continuously programmable digital filters (CPDFs) offer a broad range of high-tech applicatio
  • Transmission of Still and Moving Images Over Narrowband Channels
    PDF, 57 Kb, File published: Feb 1, 1994
    Radio networks, such as those used by emergency services or public transportation, transmit across a narrow bandwidth, thus requiring low transmission rates. This document describes the channels and transmission method of these existing networks. Applying complex algorithms to code images allows development of a source codec. This codec uses multiple TMS320C40 32-bit parallel digital signal proces
  • Design of Active Noise Control Systems With the TMS320 Family
    PDF, 646 Kb, File published: Jun 1, 1996
    An active noise control (ANC) system based on adaptive filter theory was developed in the 1980s; however, only with the recent introduction of powerful but inexpensive digital signal processor (DSP) hardware, such as the TMS320 family, has the technology become practical. The specialized DSPs were designed for real-time numerical processing of digitized signals. These devices have enabled the
  • Parallel 2-D FFT Implementation With TMS320C4x DSPs (Rev. A)
    PDF, 295 Kb, Revision: A, File published: Feb 1, 1994
    This document provides a brief review of the fast Fourier transform (FFT) algorithm and its extension to two dimensions, then focuses on parallel implementations of 2-D FFTs. It presents a TMS320C40 32-bit parallel digital signal processor (DSP) implementation of parallel 2-D FFT using the TMS320C40 development tool (PPDS). The appendices provide the C and TMS320C40 assembler source code for perfo
  • Calculation of TMS320C40 Power Dissipation
    PDF, 169 Kb, File published: Nov 1, 1993
    The TMS320C40 (?C40) DSP is a high-performance, 32-bit floating-point parallel processor with CMOS technology. The ?C40 power supply currents vary with the specific application and device program activity. This document shows the user how to determine power supply current for the ?C40 under various operating conditions. Once the current is determined, power dissapation can be calculated, followed
  • Parallel Digital Signal Processing With the TMS320C40
    PDF, 175 Kb, File published: Feb 1, 1994
    This paper examines parallel processing using the Texas Instruments TMS320C40 floating-point processor. It demonstrates popular parallel architecture topologies such as hypercube, mesh, ring, and pyramid with the ?C40 and discusses the tradeoffs and performance of these ?C40-based architectures. Thispaper is divided into the following sections: OverviewTells why the ?C40 architecture is ide
  • Parallel Processing With TMS320C4x
    PDF, 1.3 Mb, File published: Feb 1, 1994
    This document presents an in depth discussion of the TMS320C40 ('C40) digital signal processor (DSP), an introduction to parallel processing, hardware applications, software algorithms, and end-applications for the 'C40 32-bit floating-point DSP. The hardware applications prototype the 'C40 to the CYPRESS VICo68/VAC068 Interface and AMELLIA, an A/D or D/A interface to the TMS320C40 global bus. The
  • Digital Monopulse Doppler Radar and DSP Teaching
    PDF, 119 Kb, File published: Jul 1, 1997
    In 1995 several teams of EFREI students submitted a project to the Texas Instruments DSP Challenge. This paper describes the adventure of one project which passed with success the European semi-finals to go and participate to the worldwide final in May, 1996 in ATLANTA.The winning project deals with the Digital Signal Processing (hardware and software) associated with a new class of a Digital
  • 320C3x 320C4x and 320MCM42x Power-Up Sensitivity at Cold Temperatures (Rev. D)
    PDF, 248 Kb, Revision: D, File published: Aug 6, 2004
    System board-level design and end-equipment environments can impact the operation of specific commercial and military 320C3x (320C30 320C31 320LC31 320C32 and 320VC33) 320C4x (320C40 and 320C44) digital signal processors (DSPs) and the military 320MCM42x (320MCM42C and 320MCM42D) multichip modules (MCMs) during power up. The 320MCM42x MCM incorporates two 320C40 DSP die.Specifically the s
  • Setting Up TMS320 DSP Interrupts in 'C'
    PDF, 168 Kb, File published: Nov 1, 1994
    Four steps are required to set the TMS320 DSP interrupts: create a interrupt service routine initialize the vector table and set the memory map enable the interrupts in the CPU and enable the interrupt sources. This document shows how to set the interrupts in C C callable assembly or in-line C. Sample C code segments are provided. The appendix gives complete examples for setting interrupt vec

Model Line

Series: TMS320C40 (1)

Manufacturer's Classification

  • Semiconductors> Processors> Other Processors
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