Datasheet AD7766 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | 24-Bit, 8.5 mW, 109 dB, 128 kSPS/64 kSPS/32 kSPS ADCs |
| Pages / Page | 25 / 3 — AD7766. TABLE OF CONTENTS. REVISION HISTORY. 4/10—Rev. B to Rev. C. … |
| Revision | C |
| File Format / Size | PDF / 1.6 Mb |
| Document Language | English |
AD7766. TABLE OF CONTENTS. REVISION HISTORY. 4/10—Rev. B to Rev. C. 3/09—Rev. A to Rev. B. 1/09—Rev. 0 to Rev. A
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AD7766 TABLE OF CONTENTS
Features .. 1 Supply and Reference Voltages ... 16 Applications ... 1 AD7766/AD7766-1/AD77662-2 Interface .. 17 Functional Block Diagram .. 1 Initial Power-Up ... 17 General Description ... 1 Reading Data ... 17 Related Devices ... 1 Power-Down, Reset, and Synchronization ... 17 Revision History ... 2 Daisy Chaining ... 18 Specifications ... 3 Reading Data in Daisy-Chain Mode ... 18 Timing Specifications .. 5 Choosing the SCLK Frequency .. 18 Timing Diagrams .. 6 Daisy-Chain Mode Configuration and Timing Diagrams ... 19 Absolute Maximum Ratings .. 8 Driving the AD7766/AD7766-1/AD7766-2 ... 20 ESD Caution .. 8 Differential Signal Source ... 20 Pin Configuration and Function Descriptions ... 9 Single-Ended Signal Source .. 20 Typical Performance Characteristics ... 10 Antialiasing ... 21 Terminology .. 14 Power Dissipation... 21 Theory of Operation .. 15 VREF+ Input Signal ... 22 AD7766/AD7766-1/AD7766-2 Transfer Function .. 15 Multiplexing Analog Input Channels .. 22 Converter Operation .. 15 Outline Dimensions ... 23 Analog Input Structure .. 16 Ordering Guide .. 23
REVISION HISTORY 4/10—Rev. B to Rev. C
Changes to Pin 8 Description ... 9 Changes to Table 8 .. 20
3/09—Rev. A to Rev. B
Changes to tSETTLING Parameter, Table 3 .. 5 Changes to Table 7 .. 17
1/09—Rev. 0 to Rev. A
Changes to Features Section.. 1 Change to AD7766, Intermodulation Distortion (IMD) Parameter and Integral Nonlinearity Parameter, Table 2 ... 3 Change to Figure 21 and Figure 24 .. 12 Changes to Supply and Reference Voltages Section ... 16 Changes to Choosing the SCLK Frequency Section .. 18 Changes to Driving the AD7766 Section .. 20 Changes to Single-Ended Signal Source Section .. 20 Changes to Figure 40 and Figure 41 ... 20 Added Table 8; Renumbered Sequentially .. 20 Change to Figure 42 ... 21 Changes to Antialiasing Section ... 21 Changes to Table 9 .. 21 Changes to VREF+ Input Signal Section ... 22 Changes to Figure 46 .. 22
8/07—Revision 0: Initial Version
Rev. C | Page 2 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION RELATED DEVICES TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION AD7766/AD7766-1/AD7766-2 TRANSFER FUNCTION CONVERTER OPERATION ANALOG INPUT STRUCTURE SUPPLY AND REFERENCE VOLTAGES AD7766/AD7766-1/AD77662-2 INTERFACE INITIAL POWER-UP READING DATA POWER-DOWN, RESET, AND SYNCHRONIZATION DAISY CHAINING READING DATA IN DAISY-CHAIN MODE CHOOSING THE SCLK FREQUENCY DAISY-CHAIN MODE CONFIGURATION AND TIMING DIAGRAMS DRIVING THE AD7766/AD7766-1/AD7766-2 DIFFERENTIAL SIGNAL SOURCE SINGLE-ENDED SIGNAL SOURCE ANTIALIASING POWER DISSIPATION VREF+ INPUT SIGNAL MULTIPLEXING ANALOG INPUT CHANNELS OUTLINE DIMENSIONS ORDERING GUIDE
AD7766 TABLE OF CONTENTS
Features .. 1 Supply and Reference Voltages ... 16 Applications ... 1 AD7766/AD7766-1/AD77662-2 Interface .. 17 Functional Block Diagram .. 1 Initial Power-Up ... 17 General Description ... 1 Reading Data ... 17 Related Devices ... 1 Power-Down, Reset, and Synchronization ... 17 Revision History ... 2 Daisy Chaining ... 18 Specifications ... 3 Reading Data in Daisy-Chain Mode ... 18 Timing Specifications .. 5 Choosing the SCLK Frequency .. 18 Timing Diagrams .. 6 Daisy-Chain Mode Configuration and Timing Diagrams ... 19 Absolute Maximum Ratings .. 8 Driving the AD7766/AD7766-1/AD7766-2 ... 20 ESD Caution .. 8 Differential Signal Source ... 20 Pin Configuration and Function Descriptions ... 9 Single-Ended Signal Source .. 20 Typical Performance Characteristics ... 10 Antialiasing ... 21 Terminology .. 14 Power Dissipation... 21 Theory of Operation .. 15 VREF+ Input Signal ... 22 AD7766/AD7766-1/AD7766-2 Transfer Function .. 15 Multiplexing Analog Input Channels .. 22 Converter Operation .. 15 Outline Dimensions ... 23 Analog Input Structure .. 16 Ordering Guide .. 23
REVISION HISTORY 4/10—Rev. B to Rev. C
Changes to Pin 8 Description ... 9 Changes to Table 8 .. 20
3/09—Rev. A to Rev. B
Changes to tSETTLING Parameter, Table 3 .. 5 Changes to Table 7 .. 17
1/09—Rev. 0 to Rev. A
Changes to Features Section.. 1 Change to AD7766, Intermodulation Distortion (IMD) Parameter and Integral Nonlinearity Parameter, Table 2 ... 3 Change to Figure 21 and Figure 24 .. 12 Changes to Supply and Reference Voltages Section ... 16 Changes to Choosing the SCLK Frequency Section .. 18 Changes to Driving the AD7766 Section .. 20 Changes to Single-Ended Signal Source Section .. 20 Changes to Figure 40 and Figure 41 ... 20 Added Table 8; Renumbered Sequentially .. 20 Change to Figure 42 ... 21 Changes to Antialiasing Section ... 21 Changes to Table 9 .. 21 Changes to VREF+ Input Signal Section ... 22 Changes to Figure 46 .. 22
8/07—Revision 0: Initial Version
Rev. C | Page 2 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION RELATED DEVICES TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION AD7766/AD7766-1/AD7766-2 TRANSFER FUNCTION CONVERTER OPERATION ANALOG INPUT STRUCTURE SUPPLY AND REFERENCE VOLTAGES AD7766/AD7766-1/AD77662-2 INTERFACE INITIAL POWER-UP READING DATA POWER-DOWN, RESET, AND SYNCHRONIZATION DAISY CHAINING READING DATA IN DAISY-CHAIN MODE CHOOSING THE SCLK FREQUENCY DAISY-CHAIN MODE CONFIGURATION AND TIMING DIAGRAMS DRIVING THE AD7766/AD7766-1/AD7766-2 DIFFERENTIAL SIGNAL SOURCE SINGLE-ENDED SIGNAL SOURCE ANTIALIASING POWER DISSIPATION VREF+ INPUT SIGNAL MULTIPLEXING ANALOG INPUT CHANNELS OUTLINE DIMENSIONS ORDERING GUIDE
