Datasheet AD7951 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 14-Bit, 1 MSPS, Unipolar/Bipolar Programmable Input PulSAR® ADC |
| Pages / Page | 33 / 1 — 14-Bit, 1 MSPS, Unipolar/Bipolar. Programmable Input PulSAR® ADC. Data … |
| Revision | B |
| File Format / Size | PDF / 773 Kb |
| Document Language | English |
14-Bit, 1 MSPS, Unipolar/Bipolar. Programmable Input PulSAR® ADC. Data Sheet. AD7951. FEATURES. FUNCTIONAL BLOCK DIAGRAM
Model Line for this Datasheet
Text Version of Document
14-Bit, 1 MSPS, Unipolar/Bipolar Programmable Input PulSAR® ADC Data Sheet AD7951 FEATURES FUNCTIONAL BLOCK DIAGRAM Multiple pins/software programmable input ranges: 5 V, 10 V, ±5 V, ±10 V TEMP REFBUFIN REF REFGND VCC VEE DVDD DGND Pins or serial SPI® compatible input ranges/mode selection OVDD AGND AD7951 Throughput REF OGND AVDD AMP 1 MSPS (warp mode) SERIAL DATA PDREF REF PORT 800 kSPS (normal mode) PDBUF SERIAL CONFIGURATION 670 kSPS (impulse mode) PORT 14 IN+ SWITCHED D[13:0] CAP DAC 14-bit resolution with no missing codes IN– SER/PAR INL: ±0.3 LSB typ, ±1 LSB max (±61 ppm of FSR) BYTESWAP SNR: 85 dB @ 2 kHz PARALLEL CLOCK OB/2C INTERFACE CNVST i CMOS® process technology BUSY PD CONTROL LOGIC AND 5 V internal reference: typical drift 3 ppm/°C; TEMP output CALIBRATION CIRCUITRY RD RESET No pipeline delay (SAR architecture) CS Parallel (14- or 8-bit bus) and serial 5 V/3.3 V interface
001
SPI-/QSPI™-/MICROWIRE™-/DSP-compatible WARP IMPULSE BIPOLAR TEN
06396-
Power dissipation:
Figure 1.
10 mW @ 100 kSPS Table 1. 48-Lead 14-/16-/18-Bit PulSAR Selection 235 mW @ 1 MSPS 100 kSPS to 500 kSPS to 570 kSPS to >1000 48-lead LQFP and LFCSP (7 mm × 7 mm) packages Type 250 kSPS 570 kSPS 1000 kSPS kSPS
Pseudo AD7651 AD7650 AD7653
APPLICATIONS
Differential AD7660 AD7652 AD7667
Process control
AD7661 AD7664
Medical instruments
AD7666
High speed data acquisition
True Bipolar AD7610 AD7665 AD7951 AD7663 AD7612
Digital signal processing
AD7671
Instrumentation
True AD7675 AD7676 AD7677 AD7621
Spectrum analysis
Differential AD7622
ATE
AD7623 18-Bit, True AD7678 AD7679 AD7674 AD7641
GENERAL DESCRIPTION
Differential AD7643 The AD7951 is a 14-bit, charge redistribution, successive Multichannel/ AD7654 Simultaneous AD7655 approximation register (SAR) architecture analog-to-digital converter (ADC) fabricated on Analog Devices, Inc.’s iCMOS high voltage process. The device is configured through hardware or via a dedicated write only serial configuration port for input range and operating mode. The AD7951 contains a high speed 14-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports. A falling edge on CNVST samples the analog input on IN+ with respect to a ground sense, IN−. The AD7951 features four different analog input ranges and three different sampling modes: warp mode for the fastest throughput, normal mode for the fastest asynchronous throughput, and impulse mode where power is scaled with throughput. Operation is specified from −40°C to +85°C.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2006–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION OVERVIEW CONVERTER OPERATION MODES OF OPERATION Normal Mode Impulse Mode TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS Input Range Selection Input Structure VOLTAGE REFERENCE INPUT/OUTPUT Internal Reference (REF = 5 V) (PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V) (PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLIES Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) SERIAL INTERFACE Data Interface Serial Configuration Interface MASTER SERIAL INTERFACE Internal Clock (SER/PAR = High, EXT/INT = Low) Read During Convert (RDC = High) Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) SLAVE SERIAL INTERFACE External Clock (SER/PAR = High, EXT/INT = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion HARDWARE CONFIGURATION SOFTWARE CONFIGURATION MICROPROCESSOR INTERFACING SPI Interface APPLICATION INFORMATION LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE
001
SPI-/QSPI™-/MICROWIRE™-/DSP-compatible WARP IMPULSE BIPOLAR TEN
06396-
Power dissipation:
Figure 1.
10 mW @ 100 kSPS Table 1. 48-Lead 14-/16-/18-Bit PulSAR Selection 235 mW @ 1 MSPS 100 kSPS to 500 kSPS to 570 kSPS to >1000 48-lead LQFP and LFCSP (7 mm × 7 mm) packages Type 250 kSPS 570 kSPS 1000 kSPS kSPS
Pseudo AD7651 AD7650 AD7653
APPLICATIONS
Differential AD7660 AD7652 AD7667
Process control
AD7661 AD7664
Medical instruments
AD7666
High speed data acquisition
True Bipolar AD7610 AD7665 AD7951 AD7663 AD7612
Digital signal processing
AD7671
Instrumentation
True AD7675 AD7676 AD7677 AD7621
Spectrum analysis
Differential AD7622
ATE
AD7623 18-Bit, True AD7678 AD7679 AD7674 AD7641
GENERAL DESCRIPTION
Differential AD7643 The AD7951 is a 14-bit, charge redistribution, successive Multichannel/ AD7654 Simultaneous AD7655 approximation register (SAR) architecture analog-to-digital converter (ADC) fabricated on Analog Devices, Inc.’s iCMOS high voltage process. The device is configured through hardware or via a dedicated write only serial configuration port for input range and operating mode. The AD7951 contains a high speed 14-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports. A falling edge on CNVST samples the analog input on IN+ with respect to a ground sense, IN−. The AD7951 features four different analog input ranges and three different sampling modes: warp mode for the fastest throughput, normal mode for the fastest asynchronous throughput, and impulse mode where power is scaled with throughput. Operation is specified from −40°C to +85°C.
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2006–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION OVERVIEW CONVERTER OPERATION MODES OF OPERATION Normal Mode Impulse Mode TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS Input Range Selection Input Structure VOLTAGE REFERENCE INPUT/OUTPUT Internal Reference (REF = 5 V) (PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V) (PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLIES Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) SERIAL INTERFACE Data Interface Serial Configuration Interface MASTER SERIAL INTERFACE Internal Clock (SER/PAR = High, EXT/INT = Low) Read During Convert (RDC = High) Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) SLAVE SERIAL INTERFACE External Clock (SER/PAR = High, EXT/INT = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion HARDWARE CONFIGURATION SOFTWARE CONFIGURATION MICROPROCESSOR INTERFACING SPI Interface APPLICATION INFORMATION LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE
