Datasheet AD7440, AD7450A (Analog Devices) - 10

ManufacturerAnalog Devices
DescriptionDifferential Input, 1 MSPS, 12- (AD7450A) & 10-Bit (AD7440) ADCs
Pages / Page27 / 10 — AD7440/AD7450A. Data Sheet. TERMINOLOGY Signal-to-(Noise + Distortion) …
RevisionD
File Format / SizePDF / 624 Kb
Document LanguageEnglish

AD7440/AD7450A. Data Sheet. TERMINOLOGY Signal-to-(Noise + Distortion) Ratio. Aperture Delay. Aperture Jitter

AD7440/AD7450A Data Sheet TERMINOLOGY Signal-to-(Noise + Distortion) Ratio Aperture Delay Aperture Jitter

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AD7440/AD7450A Data Sheet TERMINOLOGY Signal-to-(Noise + Distortion) Ratio Aperture Delay
This is the measured ratio of signal to (noise + distortion) at the This is the amount of time from the leading edge of the output of the ADC. The signal is the rms amplitude of the sampling clock until the ADC actually takes the sample. fundamental. Noise is the sum of all nonfundamental signals
Aperture Jitter
up to half the sampling frequency (fS/2), excluding dc. The This is the sample-to-sample variation in the effective point in ratio is dependent on the number of quantization levels in the time at which the actual sample is taken. digitization process; the more levels, the smaller the quanti- zation noise. The theoretical signal-to-(noise + distortion) ratio
Full Power Bandwidth
for an ideal N-bit converter with a sine wave input is given by The ful power bandwidth of an ADC is the input frequency at the following: which the amplitude of the reconstructed fundamental is reduced by 0.1 dB or 3 dB for a full-scale input. Signal-to-(Noise + Distortion) = (6.02N + 1.76) dB
Common-Mode Rejection Ratio (CMRR)
Thus for a 12-bit converter, this is 74 dB; and for a 10-bit The common-mode rejection ratio is the ratio of the power converter, this is 62 dB. in the ADC output at ful -scale frequency, f, to the power of a
Total Harmonic Distortion (THD)
100 mV p-p sine wave applied to the common-mode voltage of THD is the ratio of the rms sum of harmonics to the VIN+ and VIN– of frequency fS as follows: fundamental. For the AD7440/AD7450A, it is defined as CMRR (dB) = 10 log (Pf/Pfs) 2 2 2 2 2 2 V + 3 V + 4 V + 5 V + 6 V Pf is the power at the frequency f in the ADC output; Pfs is the THD ) dB ( = 20 log 1 V power at frequency fS in the ADC output. where V1 is the rms amplitude of the fundamental and V2, V3,
Integral Nonlinearity (INL)
V4, V5, and V6 are the rms amplitudes of the second to the sixth This is the maximum deviation from a straight line passing harmonics. through the endpoints of the ADC transfer function.
Peak Harmonic or Spurious Noise Differential Nonlinearity (DNL)
Peak harmonic (spurious noise) is the ratio of the rms value of This is the difference between the measured and the ideal the next largest component in the ADC output spectrum (up to 1 LSB change between any two adjacent codes in the ADC. fS/2 and excluding dc) to the rms value of the fundamental.
Zero-Code Error
Normally, the value of this specification is determined by the This is the deviation of the midscale code transition largest harmonic in the spectrum, but for ADCs where the (111.. 111 to 000.. 000) from the ideal V harmonics are buried in the noise floor, it is a noise peak. IN+ − VIN– (that is, 0 LSB).
Intermodulation Distortion Positive Gain Error
With inputs consisting of sine waves at two frequencies, This is the deviation of the last code transition (011. .110 to fa and fb, any active device with nonlinearities creates distortion 011.. 111) from the ideal V products at the sum and difference frequencies of mfa ± nfb IN+ – VIN– (that is, +VREF − 1 LSB), after the zero code error has been adjusted out. where m, n = 0, 1, 2, 3, and so on. Intermodulation distortion terms are those for which neither m nor n is equal to 0. For
Negative Gain Error
example, the second-order terms include (fa + fb) and (fa – fb), This is the deviation of the first code transition (100. .000 to while the third-order terms include (2fa + fb), (2fa – fb), 100.. 001) from the ideal VIN+ − VIN– (that is, –VREF + 1 (fa + 2fb), and (fa – 2fb). LSB), after the zero code error has been adjusted out. The AD7440/AD7450A is tested using the CCIF standard of two
Track-and-Hold Acquisition Time
input frequencies near the top end of the input bandwidth. In this The track-and-hold acquisition time is the minimum time case, the second-order terms are distanced in frequency from the required for the track-and-hold amplifier to remain in track original sine waves, while the third-order terms are at a frequency mode for its output to reach and settle to within 0.5 LSB of the close to the input frequencies. As a result, the second- and third- applied input signal. order terms are specified separately. The calculation of the intermodulation distortion is as per the THD specification, where it is the ratio of the rms sum of the individual distortion products to the rms amplitude of the sum of the fundamentals, expressed in dB. Rev. D | Page 10 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY AD7440–SPECIFICATIONS AD7450A–SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY AD7440/AD7450A–TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT Analog Input Structure DRIVING DIFFERENTIAL INPUTS Differential Amplifier Op Amp Pair RF Transformer DIGITAL INPUTS REFERENCE Example 1 Example 2 SINGLE-ENDED OPERATION SERIAL INTERFACE Timing Example 1 Timing Example 2 MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER vs. THROUGHPUT RATE GROUNDING AND LAYOUT HINTS EVALUATING THE AD7440/AD7450A PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE
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