Datasheet AD7874 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 4-channel Simultaneous Sampling, 12-Bit Data Acquisition System |
| Pages / Page | 17 / 9 — AD7874. TRACK/HOLDS GO INTO HOLD. CONVST. tCONV. tACQUISITION. INT. CH1. … |
| Revision | C |
| File Format / Size | PDF / 454 Kb |
| Document Language | English |
AD7874. TRACK/HOLDS GO INTO HOLD. CONVST. tCONV. tACQUISITION. INT. CH1. HIGH-. CH2. CH3. CH4. HIGH-IMPEDANCE. DATA. HIGH-Z
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Text Version of Document
AD7874
The first read operation to the AD7874 after conversion always accesses data from Data Register 1 (i.e., the conversion result from the VIN1 input). INT is reset high on the falling edge of RD during this first read operation. The second read always ac- cesses data from Data Register 2 and so on. The address pointer is reset to point to Data Register 1 on the rising edge of CONVST. A read operation to the AD7874 should not be at- tempted during conversion. The timing diagram for the AD7874 conversion sequence is shown in Figure 7.
TRACK/HOLDS GO INTO HOLD t1 CONVST tCONV tACQUISITION INT t5 CS t8 t2 t4 RD t3 t6 t7 CH1 HIGH- CH2 HIGH- CH3 HIGH- CH4 HIGH-IMPEDANCE DATA HIGH-Z DATA DATA DATA DATA Z Z Z TIMES t2, t3, t4, t6, t7, AND t8 ARE THE SAME FOR ALL FOUR READ OPERATIONS.
Figure 7. AD7874 Timing Diagram Figure 8. AD7874 FFT Plot
AD7874 DYNAMIC SPECIFICATIONS
The AD7874 is specified and 100% tested for dynamic perfor-
Effective Number of Bits
mance specifications as well as traditional dc specifications such The formula given in Equation 1 relates the SNR to the number as Integral and Differential Nonlinearity. These ac specifications of bits. Rewriting the formula, as in Equation 2, it is possible to are required for the signal processing applications such as get a measure of performance expressed in effective number of phased array sonar, adaptive filters and spectrum analysis. bits (N). These applications require information on the ADC’s effect on the spectral content of the input signal. Hence, the parameters N = SNR − 1.76 (2) 6.02 for which the AD7874 is specified include SNR, harmonic dis- tortion, intermodulation distortion and peak harmonics. These The effective number of bits for a device can be calculated di- terms are discussed in more detail in the following sections. rectly from its measured SNR.
Signal-to-Noise Ratio (SNR)
Figure 9 shows a typical plot of effective number of bits versus SNR is the measured signal to noise ratio at the output of the frequency for an AD7874BN with a sampling frequency of ADC. The signal is the rms magnitude of the fundamental. 29 kHz. The effective number of bits typically falls between Noise is the rms sum of all the nonfundamental signals up to 11.75 and 11.87 corresponding to SNR figures of 72.5 dB and half the sampling frequency (fs/2) excluding dc. SNR is depen- 73.2 dB. dent upon the number of quantization levels used in the digiti- zation process; the more levels, the smaller the quantization noise. The theoretical signal to noise ratio for a sine wave input is given by SNR = (6.02N + 1.76) dB (1) where N is the number of bits. Thus for an ideal 12-bit converter, SNR = 74 dB. The output spectrum from the ADC is evaluated by applying a sine wave signal of very low distortion to the VIN input which is sampled at a 29 kHz sampling rate. A Fast Fourier Transform
z
(FFT) plot is generated from which the SNR data can be ob- tained. Figure 8 shows a typical 2048 point FFT plot of the Figure 9. Effective Numbers of Bits vs. Frequency AD7874BN with an input signal of 10 kHz and a sampling frequency of 29 kHz. The SNR obtained from this graph is 73.2 dB. It should be noted that the harmonics are taken into account when calculating the SNR. –8– REV. C
The first read operation to the AD7874 after conversion always accesses data from Data Register 1 (i.e., the conversion result from the VIN1 input). INT is reset high on the falling edge of RD during this first read operation. The second read always ac- cesses data from Data Register 2 and so on. The address pointer is reset to point to Data Register 1 on the rising edge of CONVST. A read operation to the AD7874 should not be at- tempted during conversion. The timing diagram for the AD7874 conversion sequence is shown in Figure 7.
TRACK/HOLDS GO INTO HOLD t1 CONVST tCONV tACQUISITION INT t5 CS t8 t2 t4 RD t3 t6 t7 CH1 HIGH- CH2 HIGH- CH3 HIGH- CH4 HIGH-IMPEDANCE DATA HIGH-Z DATA DATA DATA DATA Z Z Z TIMES t2, t3, t4, t6, t7, AND t8 ARE THE SAME FOR ALL FOUR READ OPERATIONS.
Figure 7. AD7874 Timing Diagram Figure 8. AD7874 FFT Plot
AD7874 DYNAMIC SPECIFICATIONS
The AD7874 is specified and 100% tested for dynamic perfor-
Effective Number of Bits
mance specifications as well as traditional dc specifications such The formula given in Equation 1 relates the SNR to the number as Integral and Differential Nonlinearity. These ac specifications of bits. Rewriting the formula, as in Equation 2, it is possible to are required for the signal processing applications such as get a measure of performance expressed in effective number of phased array sonar, adaptive filters and spectrum analysis. bits (N). These applications require information on the ADC’s effect on the spectral content of the input signal. Hence, the parameters N = SNR − 1.76 (2) 6.02 for which the AD7874 is specified include SNR, harmonic dis- tortion, intermodulation distortion and peak harmonics. These The effective number of bits for a device can be calculated di- terms are discussed in more detail in the following sections. rectly from its measured SNR.
Signal-to-Noise Ratio (SNR)
Figure 9 shows a typical plot of effective number of bits versus SNR is the measured signal to noise ratio at the output of the frequency for an AD7874BN with a sampling frequency of ADC. The signal is the rms magnitude of the fundamental. 29 kHz. The effective number of bits typically falls between Noise is the rms sum of all the nonfundamental signals up to 11.75 and 11.87 corresponding to SNR figures of 72.5 dB and half the sampling frequency (fs/2) excluding dc. SNR is depen- 73.2 dB. dent upon the number of quantization levels used in the digiti- zation process; the more levels, the smaller the quantization noise. The theoretical signal to noise ratio for a sine wave input is given by SNR = (6.02N + 1.76) dB (1) where N is the number of bits. Thus for an ideal 12-bit converter, SNR = 74 dB. The output spectrum from the ADC is evaluated by applying a sine wave signal of very low distortion to the VIN input which is sampled at a 29 kHz sampling rate. A Fast Fourier Transform
z
(FFT) plot is generated from which the SNR data can be ob- tained. Figure 8 shows a typical 2048 point FFT plot of the Figure 9. Effective Numbers of Bits vs. Frequency AD7874BN with an input signal of 10 kHz and a sampling frequency of 29 kHz. The SNR obtained from this graph is 73.2 dB. It should be noted that the harmonics are taken into account when calculating the SNR. –8– REV. C
