Datasheet AD8309 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 5 MHz TO 500 MHz, 100 dB Demodulating Logarithmic Amplifier with Limiter Output |
| Pages / Page | 21 / 1 — 5 MHz–500 MHz 100 dB Demodulating. Logarithmic Amplifier with Limiter … |
| Revision | B |
| File Format / Size | PDF / 352 Kb |
| Document Language | English |
5 MHz–500 MHz 100 dB Demodulating. Logarithmic Amplifier with Limiter Output. AD8309. FEATURES. FUNCTIONAL BLOCK DIAGRAM
Model Line for this Datasheet
AD8309
Text Version of Document
a
5 MHz–500 MHz 100 dB Demodulating Logarithmic Amplifier with Limiter Output AD8309 FEATURES FUNCTIONAL BLOCK DIAGRAM Complete Multistage Log-Limiting IF Amplifier SIX STAGES TOTAL GAIN 72dB TYP GAIN 18dB 100 dB Dynamic Range: –78 dBm to +22 dBm (Re 50
⍀
) Stable RSSI Scaling Over Temperature and Supplies: INHI LMHI 12dB 12dB 12dB LIM 20 mV/dB Slope, –95 dBm Intercept INLO LMLO
ⴞ
0.4 dB RSSI Linearity up to 200 MHz LADR ATTEN BIAS LMDR CTRL Programmable Limiter Gain and Output Current 4
3
DET DET DET DET Differential Outputs to 10 mA, 2.4 V p-p I-V VLOG Overall Gain 100 dB, Bandwidth 500 MHz TEN DETECTORS SPACED 12dB FLTR Constant Phase (Typical
ⴞ
80 ps Delay Skew) Single Supply of +2.7 V to +6.5 V at 16 mA Typical GAIN BAND-GAP SLOPE INTERCEPT ENBL Fully Differential Inputs, R BIAS REFERENCE BIAS TEMP COMP IN = 1 k
⍀
, CIN = 2.5 pF 500 ns Power-Up Time, <1
A Sleep Current APPLICATIONS Receivers for Frequency and Phase Modulation Very Wide Range IF and RF Power Measurement Receiver Signal Strength Indication (RSSI) Low Cost Radar and Sonar Signal Processing Instrumentation: Network and Spectrum Analyzers PRODUCT DESCRIPTION
The overall dynamic range for this combination extends from The AD8309 is a complete IF limiting amplifier, providing both –91 dBV (–78 dBm at the 50 Ω level) to a maximum permissible an accurate logarithmic (decibel) measure of the input signal value of +9 dBV, using a balanced drive of antiphase inputs each (the RSSI function) over a dynamic range of 100 dB, and a of 2 V in amplitude, which would correspond to a sine wave programmable limiter output, useful from 5 MHz to 500 MHz. power of +22 dBm if the differential input were terminated in It is easy to use, requiring few external components. A single 50 Ω. The slope of the RSSI output is closely controlled to supply voltage of +2.7 V to +6.5 V at 16 mA is needed, corre- 20 mV/dB, while the intercept is set to –108 dBV (–95 dBm sponding to a power consumption of under 50 mW at 3 V, plus re 50 Ω). These scaling parameters are determined by a band- the limiter bias current, determined by the application and gap voltage reference and are substantially independent of tem- typically 2 mA, providing a limiter gain of 100 dB when using perature and supply. The logarithmic law conformance is typically 200 Ω loads. A CMOS-compatible control interface can enable within ± 0.4 dB over the central 80 dB of this range at any fre- the AD8309 within about 500 ns and disable it to a standby quency between 10 MHz and 200 MHz, and is degraded only current of under 1 µA. slightly at 500 MHz. The six cascaded amplifier/limiter cells in the main path have a The RSSI response time is nominally 67 ns (10%–90%). The small signal gain of 12.04 dB (×4), with a –3 dB bandwidth of averaging time may be increased without limit by the addition of 850 MHz, providing a total gain of 72 dB. The programmable an external capacitor. The full output of 2.34 V at the maximum output stage provides a further 18 dB of gain. The input is fully input of +9 dBV can drive any resistive load down to 50 Ω and differential and presents a moderately high impedance (1 kΩ in this interface remains stable with any value of capacitance on parallel with 2.5 pF). The input-referred noise-spectral-density, the output. when driven from a terminated 50 Ω, source is 1.28 nV/√Hz, The AD8309 is fabricated on an advanced complementary equivalent to a noise figure of 3 dB. The sensitivity of the bipolar process using silicon-on-insulator isolation techniques AD8309 can be raised by using an input matching network. and is available in the industrial temperature range of –40°C to Each of the main gain cells includes a full-wave detector. An +85°C, in a 16-lead TSSOP package. additional four detectors, driven by a broadband attenuator, are used to extend the top end of the dynamic range by over 48 dB. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
which may result from its use. No license is granted by implication or
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
otherwise under any patent or patent rights of Analog Devices.
Fax: 781/326-8703 © Analog Devices, Inc., 1999
5 MHz–500 MHz 100 dB Demodulating Logarithmic Amplifier with Limiter Output AD8309 FEATURES FUNCTIONAL BLOCK DIAGRAM Complete Multistage Log-Limiting IF Amplifier SIX STAGES TOTAL GAIN 72dB TYP GAIN 18dB 100 dB Dynamic Range: –78 dBm to +22 dBm (Re 50
⍀
) Stable RSSI Scaling Over Temperature and Supplies: INHI LMHI 12dB 12dB 12dB LIM 20 mV/dB Slope, –95 dBm Intercept INLO LMLO
ⴞ
0.4 dB RSSI Linearity up to 200 MHz LADR ATTEN BIAS LMDR CTRL Programmable Limiter Gain and Output Current 4
3
DET DET DET DET Differential Outputs to 10 mA, 2.4 V p-p I-V VLOG Overall Gain 100 dB, Bandwidth 500 MHz TEN DETECTORS SPACED 12dB FLTR Constant Phase (Typical
ⴞ
80 ps Delay Skew) Single Supply of +2.7 V to +6.5 V at 16 mA Typical GAIN BAND-GAP SLOPE INTERCEPT ENBL Fully Differential Inputs, R BIAS REFERENCE BIAS TEMP COMP IN = 1 k
⍀
, CIN = 2.5 pF 500 ns Power-Up Time, <1
A Sleep Current APPLICATIONS Receivers for Frequency and Phase Modulation Very Wide Range IF and RF Power Measurement Receiver Signal Strength Indication (RSSI) Low Cost Radar and Sonar Signal Processing Instrumentation: Network and Spectrum Analyzers PRODUCT DESCRIPTION
The overall dynamic range for this combination extends from The AD8309 is a complete IF limiting amplifier, providing both –91 dBV (–78 dBm at the 50 Ω level) to a maximum permissible an accurate logarithmic (decibel) measure of the input signal value of +9 dBV, using a balanced drive of antiphase inputs each (the RSSI function) over a dynamic range of 100 dB, and a of 2 V in amplitude, which would correspond to a sine wave programmable limiter output, useful from 5 MHz to 500 MHz. power of +22 dBm if the differential input were terminated in It is easy to use, requiring few external components. A single 50 Ω. The slope of the RSSI output is closely controlled to supply voltage of +2.7 V to +6.5 V at 16 mA is needed, corre- 20 mV/dB, while the intercept is set to –108 dBV (–95 dBm sponding to a power consumption of under 50 mW at 3 V, plus re 50 Ω). These scaling parameters are determined by a band- the limiter bias current, determined by the application and gap voltage reference and are substantially independent of tem- typically 2 mA, providing a limiter gain of 100 dB when using perature and supply. The logarithmic law conformance is typically 200 Ω loads. A CMOS-compatible control interface can enable within ± 0.4 dB over the central 80 dB of this range at any fre- the AD8309 within about 500 ns and disable it to a standby quency between 10 MHz and 200 MHz, and is degraded only current of under 1 µA. slightly at 500 MHz. The six cascaded amplifier/limiter cells in the main path have a The RSSI response time is nominally 67 ns (10%–90%). The small signal gain of 12.04 dB (×4), with a –3 dB bandwidth of averaging time may be increased without limit by the addition of 850 MHz, providing a total gain of 72 dB. The programmable an external capacitor. The full output of 2.34 V at the maximum output stage provides a further 18 dB of gain. The input is fully input of +9 dBV can drive any resistive load down to 50 Ω and differential and presents a moderately high impedance (1 kΩ in this interface remains stable with any value of capacitance on parallel with 2.5 pF). The input-referred noise-spectral-density, the output. when driven from a terminated 50 Ω, source is 1.28 nV/√Hz, The AD8309 is fabricated on an advanced complementary equivalent to a noise figure of 3 dB. The sensitivity of the bipolar process using silicon-on-insulator isolation techniques AD8309 can be raised by using an input matching network. and is available in the industrial temperature range of –40°C to Each of the main gain cells includes a full-wave detector. An +85°C, in a 16-lead TSSOP package. additional four detectors, driven by a broadband attenuator, are used to extend the top end of the dynamic range by over 48 dB. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
which may result from its use. No license is granted by implication or
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
otherwise under any patent or patent rights of Analog Devices.
Fax: 781/326-8703 © Analog Devices, Inc., 1999
