Datasheet LTC2323-12 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | Dual, 12-Bit + Sign, 5Msps Differential Input ADC with Wide Input Common Mode Range |
| Pages / Page | 26 / 1 — FEATURES. DESCRIPTION. 5Msps Throughput Rate. ±0.5LSB INL (Typ). … |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
FEATURES. DESCRIPTION. 5Msps Throughput Rate. ±0.5LSB INL (Typ). Guaranteed 12-Bit, No Missing Codes
Model Line for this Datasheet
Text Version of Document
LTC2323-12 Dual, 12-Bit + Sign, 5Msps Differential Input ADC with Wide Input Common Mode Range
FEATURES DESCRIPTION
n
5Msps Throughput Rate
The LTC®2323-12 is a low noise, high speed dual n
±0.5LSB INL (Typ)
12-bit + sign successive approximation register (SAR) n
Guaranteed 12-Bit, No Missing Codes
ADC with differential inputs and wide input common mode n
8VP-P Differential Inputs with Wide Input Common
range. Operating from a single 3.3V or 5V supply, the
Mode Range
LTC2323-12 has an 8VP-P differential input range, making n
73dB SNR (Typ) at fIN = 2MHz
it ideal for applications which require a wide dynamic n
–85dB THD (Typ) at fIN = 2MHz
range with high common mode rejection. The LTC2323- n Guaranteed Operation to 125°C 12 achieves ±0.5LSB INL typical, no missing codes at 12 n Single 3.3V or 5V Supply bits and 73dB SNR. n Low Drift (20ppm/°C Max) 2.048V or 4.096V Internal The LTC2323-12 has an onboard low drift (20ppm/°C max) Reference 2.048V or 4.096V temperature-compensated reference. n 1.8V to 2.5V I/O Voltages The LTC2323-12 also has a high speed SPI-compatible n CMOS or LVDS SPI-Compatible Serial I/O serial interface that supports CMOS or LVDS. The fast n Power Dissipation 38mW/Ch (Typ) 5Msps per channel throughput with one-cycle latency n Small 28-Lead (4mm × 5mm) QFN Package makes the LTC2323-12 ideally suited for a wide variety of high speed applications. The LTC2323-12 dissipates only
APPLICATIONS
38mW per channel and offers nap and sleep modes to n High Speed Data Acquisition Systems reduce the power consumption to 5μW for further power n Communications savings during inactive periods. n Remote Data Acquisition L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Analog n Imaging Devices, Inc. All other trademarks are the property of their respective owners. n Optical Networking n Automotive n Multiphase Motor Control
TYPICAL APPLICATION 16k Point FFT fS = 5Msps, fIN = 2.2MHz DIFFERENTIAL INPUTS
3.3V OR 5V
NO CONFIGURATION REQUIRED
0 SNR = 73dBFS
IN+, IN–
10µF THD = –86dB –20 SINAD = 72.8dB INSTRUMENTATION DIFFERENTIAL V REFOUT1 25Ω DD SFDR = 88dB 10µF AIN1+ VBYP1 –40 1µF
LTC2323-12
0V 0V 220pF REFOUT2 10µF –60
VBYP2 BIPOLAR UNIPOLAR 1µF AMPLITUDE (dBFS) –80 25Ω A SDO1 IN1– TO CONTROL AIN2+ SDO2 LOGIC –100 AIN2– CLKOUT (FPGA, CPLD, 0V 0V V CMOS/LVDS SCK DSP, ETC.) DD REFINT CNV –120 GND OGND OVDD 1.8V TO 2.5V 0 0.5 1 1.5 2 2.5 1µF FREQUENCY (MHz) 232312 TA01a 232312 TA01b 232312fb For more information www.linear.com/LTC2323-12 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts
FEATURES DESCRIPTION
n
5Msps Throughput Rate
The LTC®2323-12 is a low noise, high speed dual n
±0.5LSB INL (Typ)
12-bit + sign successive approximation register (SAR) n
Guaranteed 12-Bit, No Missing Codes
ADC with differential inputs and wide input common mode n
8VP-P Differential Inputs with Wide Input Common
range. Operating from a single 3.3V or 5V supply, the
Mode Range
LTC2323-12 has an 8VP-P differential input range, making n
73dB SNR (Typ) at fIN = 2MHz
it ideal for applications which require a wide dynamic n
–85dB THD (Typ) at fIN = 2MHz
range with high common mode rejection. The LTC2323- n Guaranteed Operation to 125°C 12 achieves ±0.5LSB INL typical, no missing codes at 12 n Single 3.3V or 5V Supply bits and 73dB SNR. n Low Drift (20ppm/°C Max) 2.048V or 4.096V Internal The LTC2323-12 has an onboard low drift (20ppm/°C max) Reference 2.048V or 4.096V temperature-compensated reference. n 1.8V to 2.5V I/O Voltages The LTC2323-12 also has a high speed SPI-compatible n CMOS or LVDS SPI-Compatible Serial I/O serial interface that supports CMOS or LVDS. The fast n Power Dissipation 38mW/Ch (Typ) 5Msps per channel throughput with one-cycle latency n Small 28-Lead (4mm × 5mm) QFN Package makes the LTC2323-12 ideally suited for a wide variety of high speed applications. The LTC2323-12 dissipates only
APPLICATIONS
38mW per channel and offers nap and sleep modes to n High Speed Data Acquisition Systems reduce the power consumption to 5μW for further power n Communications savings during inactive periods. n Remote Data Acquisition L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Analog n Imaging Devices, Inc. All other trademarks are the property of their respective owners. n Optical Networking n Automotive n Multiphase Motor Control
TYPICAL APPLICATION 16k Point FFT fS = 5Msps, fIN = 2.2MHz DIFFERENTIAL INPUTS
3.3V OR 5V
NO CONFIGURATION REQUIRED
0 SNR = 73dBFS
IN+, IN–
10µF THD = –86dB –20 SINAD = 72.8dB INSTRUMENTATION DIFFERENTIAL V REFOUT1 25Ω DD SFDR = 88dB 10µF AIN1+ VBYP1 –40 1µF
LTC2323-12
0V 0V 220pF REFOUT2 10µF –60
VBYP2 BIPOLAR UNIPOLAR 1µF AMPLITUDE (dBFS) –80 25Ω A SDO1 IN1– TO CONTROL AIN2+ SDO2 LOGIC –100 AIN2– CLKOUT (FPGA, CPLD, 0V 0V V CMOS/LVDS SCK DSP, ETC.) DD REFINT CNV –120 GND OGND OVDD 1.8V TO 2.5V 0 0.5 1 1.5 2 2.5 1µF FREQUENCY (MHz) 232312 TA01a 232312 TA01b 232312fb For more information www.linear.com/LTC2323-12 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts
