Datasheet LTC2323-16 (Analog Devices) - 10

ManufacturerAnalog Devices
DescriptionDual, 16-Bit, 5Msps Differential Input ADC with Wide Input Common Mode Range
Pages / Page26 / 10 — FUNCTIONAL BLOCK DIAGRAM. TIMING DIAGRAM
File Format / SizePDF / 1.3 Mb
Document LanguageEnglish

FUNCTIONAL BLOCK DIAGRAM. TIMING DIAGRAM

FUNCTIONAL BLOCK DIAGRAM TIMING DIAGRAM

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LTC2323-16
FUNCTIONAL BLOCK DIAGRAM
VDD 1,8 LDO VBYP1 13 AIN1+ 7 + LVDS/CMOS SDO1+ 15 16-BIT TRI-STATE S/H SAR ADC SD01– A SERIAL OUTPUT 16 IN1– 6 – 28 REFINT REFOUT1 GND 12 G 4, 5, 10, 29 1.2V REF OVDD 14 REFOUT2 26 G CLKOUT+ CNV TIMING CONTROL OUTPUT 17 9 LOGIC CLOCK DRIVER CLKOUT– 18 SCK+ LVDS/CMOS 21 RECEIVERS SCK– 22 A 2 IN2+ + LVDS/CMOS SDO2+ 19 16-BIT TRI-STATE S/H SAR ADC SDO2– A SERIAL OUTPUT 20 IN2– 3 – VDD 1,8 VBYP2 24 LDO 232316 BD
TIMING DIAGRAM
ACQUISITION CONVERSION AND READOUT ACQUISITION CNV SCK HI-Z HI-Z B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 SDO CLKOUT 232316 TD SERIAL DATA BITS B[15:0] CORRESPOND TO PREVIOUS CONVERSION 232316fc 10 For more information www.linear.com/LTC2323-16 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Related Parts
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