Datasheet NXP 74HCU04BQ,115

74HCU04
Hex inverter
Rev. 6 -27 December 2012 Product data sheet 1. General description
The 74HCU04 is a hex unbuffered inverter. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits Complies with JEDEC standard JESD7A Balanced propagation delays ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +125 C 3. Ordering information
Table 1. Ordering information Package Temperature range 74HCU04N 74HCU04D 74HCU04DB 74HCU04PW 74HCU04BQ Name Description plastic dual in-line package; 14 leads (300 mil) plastic shrink small outline package; 14 leads; body width 5.3 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT27-1 SOT337-1 SOT402-1 SOT762-1 Type number 40 C to +125 C DIP14 40 C to +125 C SO14 40 C to +125 C SSOP14 40 C to +125 C TSSOP14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 3 0.85 mm NXP Semiconductors 74HCU04
Hex inverter 4. Functional diagram
1 1 2 1 1A 1Y 2 3 1 4 3 2A 2Y 4 5 1 6 5 3A 3Y 6 9 1 8 9 4A 4Y 8 11 5A 5Y 10 11 1 10 13 6A 6Y 12 13 1
mna343 12 A Y
mna045 mna342 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one inverter) 5. Pinning information
74HCU04
terminal 1 index area 14 VCC 13 6A 12 6Y 11 5A VCC 7
(1) 74HCU04
1A 1Y 2A 2Y 3A 3Y GND 1 2 3 4 5 6 7
001aal924 1Y 14 VCC 13 6A 12 6Y 11 5A 10 5Y 9 8 4A 4Y 3Y 2A 2Y 3A 2 3 4 5 6 GND 4Y 8 1 1A 10 5Y 9 4A 001aal925 Transparent top view (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14 74HCU04 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 6 -27 December 2012 2 of 18 NXP Semiconductors 74HCU04
Hex inverter 5.1 Pin description
Table 2. Symbol 1A 1Y 2A 2Y 3A 3Y GND 4Y 4A 5Y 5A 6Y 6A VCC Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Description data input data output data input data output data input data output ground (0 V) data output data input data output data input data output data input supply voltage 6. Functional descript …