Datasheet Texas Instruments CD74HC390M96E4
| Manufacturer | Texas Instruments |
| Series | CD74HC390 |
| Part Number | CD74HC390M96E4 |
High Speed CMOS Logic Dual Decade Ripple Counters 16-SOIC -55 to 125
Datasheets
CD74HC390, CD54HCT390, CD74HCT390 datasheet
PDF, 456 Kb, Revision: C, File published: Oct 16, 2003
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Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 16 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | HC390M |
| Width (mm) | 3.91 |
| Length (mm) | 9.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| Bits | 4 |
| F @ Nom Voltage(Max) | 28 Mhz |
| Function | Counter |
| ICC @ Nom Voltage(Max) | 0.08 mA |
| IOH(Max) | -5.2 mA |
| IOL(Max) | 5.2 mA |
| Operating Temperature Range | -55 to 125 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG |
| Rating | Catalog |
| Technology Family | HC |
| Type | Decade |
| VCC(Max) | 6 V |
| VCC(Min) | 2 V |
| Voltage(Nom) | 3.3,5 V |
| tpd @ Nom Voltage(Max) | 52 ns |
Eco Plan
| RoHS | Compliant |
Application Notes
- SN54/74HCT CMOS Logic Family Applications and RestrictionsPDF, 102 Kb, File published: May 1, 1996
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- Designing With Logic (Rev. C)PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - CMOS Power Consumption and CPD Calculation (Rev. B)PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale - Semiconductor Packing Material Electrostatic Discharge (ESD) ProtectionPDF, 337 Kb, File published: Jul 8, 2004
Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge - Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)PDF, 614 Kb, Revision: C, File published: Dec 2, 2015
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren - Introduction to LogicPDF, 93 Kb, File published: Apr 30, 2015
Model Line
Series: CD74HC390 (6)
- CD74HC390E CD74HC390EE4 CD74HC390M CD74HC390M96 CD74HC390M96E4 CD74HC390M96G4
Manufacturer's Classification
- Semiconductors > Logic > Specialty Logic > Counter/Arithmetic/Parity Function
