Datasheet MAX4073T, MAX4073F, MAX4073H (Maxim) - 3
| Manufacturer | Maxim |
| Description | Low-Cost, SC70, Voltage-Output, High-Side Current-Sense Amplifier |
| Pages / Page | 12 / 3 — MAX4073T/F/H. Low-Cost, SC70, Voltage-Output,. High-Side Current-Sense … |
| Revision | 1 |
| File Format / Size | PDF / 370 Kb |
| Document Language | English |
MAX4073T/F/H. Low-Cost, SC70, Voltage-Output,. High-Side Current-Sense Amplifier. ELECTRICAL CHARACTERISTICS (continued)
Model Line for this Datasheet
Text Version of Document
MAX4073T/F/H Low-Cost, SC70, Voltage-Output, High-Side Current-Sense Amplifier ELECTRICAL CHARACTERISTICS (continued)
(VRS+ = +2V to +28V, VSENSE = (VRS+ - VRS-) = 0, VCC = +3V to +28V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX4073T, 1.8 VSENSE = 100mV MAX4073F, 1.7 MHz VCC = 12V, VSENSE = 100mV Bandwidth BW VRS+ = 12V, MAX4073H, CLOAD = 5pF 1.6 VSENSE = 100mV MAX4073T/F/H 600 kHz VSENSE = 6.25mV (Note 5) MAX4073T 20 Gain AV MAX4073F 50 V/V MAX4073H 100 VCC = 12V, TA = +25°C ±1.0 ±4.5 VRS+ = 12V, VSENSE = 10mV to 150mV, TA = TMIN to TMAX ±6.5 MAX4073T/F Gain Accuracy ∆AV % VCC = 12V, TA = +25 V °C ±1.0 ±4.5 RS+ = 12V, VSENSE = 10mV to 100mV, TA = TMIN to TMAX ±6.5 MAX4073H VSENSE = 6.25mV to VCC = 12V 400 OUT Settling Time to 1% of Final 100mV VRS+ = 12V ns Value CLOAD = 5pF VSENSE = 100mV to 800 6.25mV Output Resistance ROUT 12 kΩ VSENSE = 60mV, MAX4073T 70 78 Power-Supply Rejection Ratio PSRR V C C = 3V to 28V VSENSE = 24mV, MAX4073F 70 85 dB VSENSE = 12mV, MAX4073H 70 90 Power-Up Time (Note 6) CLOAD = 5pF, VSENSE = 100mV 5 µs Saturation Recovery Time VCC = 12V, VRS+ = 12V, 5 µs (Note 7) CLOAD = 5pF
Note 1:
All devices are 100% production tested at TA = +25°C. All temperature limits are guaranteed by design.
Note 2:
Inferred from PSRR test.
Note 3:
Inferred from OUT Voltage Error test.
Note 4:
Total OUT Voltage Error is the sum of the gain and offset errors.
Note 5:
6.25mV = 1/16 of 100mV full-scale sense voltage.
Note 6:
Output settles to within 1% of final value.
Note 7:
The device will not experience phase reversal when overdriven.
3
Maxim Integrated
(VRS+ = +2V to +28V, VSENSE = (VRS+ - VRS-) = 0, VCC = +3V to +28V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX4073T, 1.8 VSENSE = 100mV MAX4073F, 1.7 MHz VCC = 12V, VSENSE = 100mV Bandwidth BW VRS+ = 12V, MAX4073H, CLOAD = 5pF 1.6 VSENSE = 100mV MAX4073T/F/H 600 kHz VSENSE = 6.25mV (Note 5) MAX4073T 20 Gain AV MAX4073F 50 V/V MAX4073H 100 VCC = 12V, TA = +25°C ±1.0 ±4.5 VRS+ = 12V, VSENSE = 10mV to 150mV, TA = TMIN to TMAX ±6.5 MAX4073T/F Gain Accuracy ∆AV % VCC = 12V, TA = +25 V °C ±1.0 ±4.5 RS+ = 12V, VSENSE = 10mV to 100mV, TA = TMIN to TMAX ±6.5 MAX4073H VSENSE = 6.25mV to VCC = 12V 400 OUT Settling Time to 1% of Final 100mV VRS+ = 12V ns Value CLOAD = 5pF VSENSE = 100mV to 800 6.25mV Output Resistance ROUT 12 kΩ VSENSE = 60mV, MAX4073T 70 78 Power-Supply Rejection Ratio PSRR V C C = 3V to 28V VSENSE = 24mV, MAX4073F 70 85 dB VSENSE = 12mV, MAX4073H 70 90 Power-Up Time (Note 6) CLOAD = 5pF, VSENSE = 100mV 5 µs Saturation Recovery Time VCC = 12V, VRS+ = 12V, 5 µs (Note 7) CLOAD = 5pF
Note 1:
All devices are 100% production tested at TA = +25°C. All temperature limits are guaranteed by design.
Note 2:
Inferred from PSRR test.
Note 3:
Inferred from OUT Voltage Error test.
Note 4:
Total OUT Voltage Error is the sum of the gain and offset errors.
Note 5:
6.25mV = 1/16 of 100mV full-scale sense voltage.
Note 6:
Output settles to within 1% of final value.
Note 7:
The device will not experience phase reversal when overdriven.
3
Maxim Integrated
