MCP6421/2/4Note: Unless otherwise indicated, TA= +25°C, VDD = +1.8V to +5.5V, VSS= GND, VCM = VDD/2, VOUT = VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 30 pF. 15040Isc+@ T = +125°C14030AT = +85°CA130T = +25°C20AT = -40°CA12010110Circuit Current0(mA)100V= 5.5VDDV= 1.8V-10DD90Isc-@ T = +125°C-Open Loop Gain (dB)t ShortA-20T = +85°85 C20°ADC80T = +25°CA-30T = -40°C70OutpuA0.000.050.100.150.200.250.30-40Output Voltage Headroom (V)00.511.522.533.544.555.5V- Vor V- VPower Supply Voltage (V)DDOHOLSSFIGURE 2-19: DC Open-Loop Gain vs. FIGURE 2-22: Output Short Circuit Current Output Voltage Headroom. vs. Power Supply Voltage. 100.018010)160V= 5.5VDD90.0P-P14080.0120ing (VV= 1.8VDDgin (°)70.0idth ProductGain Bandwidth Product100Sw(MHz)18060.0andwltagease MarBo60h50.0Pt V40GainPhase Margin40.0V= 12V= 5.5VDD20Outpu30.000.1-50-2502550751001251000100001000001k10k100kAmbient Temperature (°C)Frequency (Hz)FIGURE 2-20: Gain Bandwidth Product, FIGURE 2-23: Output Voltage Swing vs. Phase Margin vs. Ambient Temperature. Frequency. 100.01801000160V= 1.8V90.0DD14080.010012070.0gin (°)V- Vidth ProductGain Bandwidth Product100DDOH(MHz)108060.0andw B60ase Mar60oltage Headroom (mV)50.0V- VPhVOLSSV401Phase MarginGain40.020V= 1.8VDDOutput30.000.1-50-2502550751001250.0010.010.1110100Ambient Temperature (°C)Output Current (mA)FIGURE 2-21: Gain Bandwidth Product, FIGURE 2-24: Output Voltage Headroom Phase Margin vs. Ambient Temperature. vs. Output Current. DS20005165B-page 10 2013 Microchip Technology Inc. Document Outline Typical Application Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC electrical specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-7: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Current vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Power Supply Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-22: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-28: Slew Rate vs. Ambient Temperature. FIGURE 2-29: Small Signal Non-Inverting Pulse Response. FIGURE 2-30: Small Signal Inverting Pulse Response. FIGURE 2-31: Large Signal Non-Inverting Pulse Response. FIGURE 2-32: Large Signal Inverting Pulse Response. FIGURE 2-33: The MCP6421/2/4 Device Shows No Phase Reversal. FIGURE 2-34: Closed Loop Output Impedance vs. Frequency. FIGURE 2-35: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-36: EMIRR vs. Frequency. FIGURE 2-37: EMIRR vs. RF Input Peak- to-Peak Voltage. FIGURE 2-38: Channel-to-Channel Separation vs. Frequency. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins (VSS, VDD) 4.0 Application Information 4.1 Rail-to-Rail Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Electromagnetic Interference Rejection Ratio (EMIRR) Definitions 4.8 Application Circuits FIGURE 4-8: CO Gas Sensor Circuit. FIGURE 4-9: Pressure Sensor Amplifier. FIGURE 4-10: Battery Current Sensing. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service