Datasheet ADA4062-2, ADA4062-4 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Low Power JFET-Input Op Amps |
| Pages / Page | 20 / 7 — ADA4062-2/ADA4062-4. VSY = ±5V. VSY = ±15V. (mV. –15. –12. CM (V). 10000. … |
| Revision | B |
| File Format / Size | PDF / 508 Kb |
| Document Language | English |
ADA4062-2/ADA4062-4. VSY = ±5V. VSY = ±15V. (mV. –15. –12. CM (V). 10000. SY = ±5V. SY = ±15V. 1000. 100. I B. 0.1. –50. –25. 125. TEMPERATURE (°C)
Model Line for this Datasheet
Text Version of Document
ADA4062-2/ADA4062-4 5 5 VSY = ±5V VSY = ±15V 4 4 3 3 2 2 1 ) 1 ) (mV 0 (mV 0 OS OS V –1 V –1 –2 –2 –3 –3 –4 –4 –5
6
–5
6
–4 –3 –2 –1 0 1 2 3 4 5
05
–15 –12 –9 –6 –3 0 3 6 9 12 15
00 0- 0- 67
V
67 07
CM (V) V
07
CM (V)
Figure 11. Input Offset Voltage vs. Common-Mode Voltage Figure 14. Input Offset Voltage vs. Common-Mode Voltage
10000 10000 V V SY = ±5V SY = ±15V 1000 1000 100 100 ) ) A A (p (p I B I B 10 10 1 1 0.1 0.1 –50 –25 0 25 50 75 100 125
12 09 0
–50 –25 0 25 50 75 100 125
0 0- 0- 67 767
TEMPERATURE (°C)
0
TEMPERATURE (°C)
07 Figure 12. Input Bias Current vs. Temperature Figure 15. Input Bias Current vs. Temperature
3 5 VSY = ±5V VSY = ±15V 2 4 1 3 ) ) A A (p (p I B I B 0 2 –1 1 –2 0
3 0
–3 –2 –1 0 1 2 3 4 5
01
–12 –10 –8 –6 –4 –2 0 2 4 6 8 10 12 14 16
01 0- 0- 67 67
V
07
CM (V) V
07
CM (V)
Figure 13. Input Bias Current vs. Common-Mode Voltage Figure 16. Input Bias Current vs. Common-Mode Voltage Rev. B | Page 7 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONFIGURATIONS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE POWER SEQUENCING ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION NOTCH FILTER HIGH-SIDE SIGNAL CONDITIONING MICROPOWER INSTRUMENTATION AMPLIFIER PHASE REVERSAL SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE
6
–5
6
–4 –3 –2 –1 0 1 2 3 4 5
05
–15 –12 –9 –6 –3 0 3 6 9 12 15
00 0- 0- 67
V
67 07
CM (V) V
07
CM (V)
Figure 11. Input Offset Voltage vs. Common-Mode Voltage Figure 14. Input Offset Voltage vs. Common-Mode Voltage
10000 10000 V V SY = ±5V SY = ±15V 1000 1000 100 100 ) ) A A (p (p I B I B 10 10 1 1 0.1 0.1 –50 –25 0 25 50 75 100 125
12 09 0
–50 –25 0 25 50 75 100 125
0 0- 0- 67 767
TEMPERATURE (°C)
0
TEMPERATURE (°C)
07 Figure 12. Input Bias Current vs. Temperature Figure 15. Input Bias Current vs. Temperature
3 5 VSY = ±5V VSY = ±15V 2 4 1 3 ) ) A A (p (p I B I B 0 2 –1 1 –2 0
3 0
–3 –2 –1 0 1 2 3 4 5
01
–12 –10 –8 –6 –4 –2 0 2 4 6 8 10 12 14 16
01 0- 0- 67 67
V
07
CM (V) V
07
CM (V)
Figure 13. Input Bias Current vs. Common-Mode Voltage Figure 16. Input Bias Current vs. Common-Mode Voltage Rev. B | Page 7 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONFIGURATIONS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE POWER SEQUENCING ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION NOTCH FILTER HIGH-SIDE SIGNAL CONDITIONING MICROPOWER INSTRUMENTATION AMPLIFIER PHASE REVERSAL SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE
