Datasheet LTC1406 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Low Power, 8-Bit, 20Msps, Sampling A/D Converter |
| Pages / Page | 16 / 7 — FUNCTIONAL BLOCK DIAGRA. APPLICATIONS INFORMATION. Conversion Details. … |
| File Format / Size | PDF / 381 Kb |
| Document Language | English |
FUNCTIONAL BLOCK DIAGRA. APPLICATIONS INFORMATION. Conversion Details. Dynamic Performance
Model Line for this Datasheet
Text Version of Document
LTC1406
U U W FUNCTIONAL BLOCK DIAGRA
DVDD DGND OVDD 12 11 2 24 CLOCK CLK CIRCUITRY 23 OF/UF 22 D7 21 D6 7 DIGITAL A + 20 IN DATA D5 8-BIT TRACK-AND- OUTPUT 19 PIPELINE D4 HOLD AMP DRIVERS 8 ADC 18 A – D3 IN 17 D2 2.2V 16 D1 2.5k 1.95k 15 D0 9 4 10 3 5 6 1 AVDD VBIAS AGND SHDN VREF AGND OGND 1406 BD
U U W U APPLICATIONS INFORMATION Conversion Details
capacitors CH resulting in a differential DC voltage on the output of the track-and-hold amplifier that is proportional The LTC1406 uses an internal sample-and-hold circuit and to the input signal. This differential voltage is fed into a a pipeline quantizing architecture to convert an analog comparator that determines the most significant bit and signal to an 8-bit parallel output. With CLK high the input subtracts the result. The residue is then amplified by two switches are closed and the analog input will be acquired and passed to the next stage via a similar sample-and-hold on the input sampling capacitors CS (see Figure 1). circuit. This continues down the eight pipeline stages. The On the falling edge of CLK the input switches open, captur- comparator outputs are then combined in a digital error ing the input signal. The sampling capacitors are then correction circuit. The 8-bit word is available at the output, shorted together and the charge is transferred to the hold five clock cycles after the sampling edge. CLK
Dynamic Performance
CH The LTC1406 has excellent wideband sampling capability. The sample-and-hold amplifier has a small-signal input CS CLK bandwidth of 250MHz allowing the ADC to undersample A + IN + input signals with frequencies well beyond the converter’s CLK C CLK TO NEXT STAGE S CLK Nyquist frequency. FFT (Fast Fourier Transform) test tech- A – IN – niques are used to test the ADC’s frequency response, CH distortion and noise at the rated throughput. By applying a low distortion sine wave and analyzing the digital output 1406 F01 CLK using an FFT algorithm, the ADC’s spectral content can be examined for frequencies outside the fundamental. Figure
Figure 1. Input Sample-and-Hold Amplifier
2 shows a typical LTC1406 FFT plot. 7
U U W FUNCTIONAL BLOCK DIAGRA
DVDD DGND OVDD 12 11 2 24 CLOCK CLK CIRCUITRY 23 OF/UF 22 D7 21 D6 7 DIGITAL A + 20 IN DATA D5 8-BIT TRACK-AND- OUTPUT 19 PIPELINE D4 HOLD AMP DRIVERS 8 ADC 18 A – D3 IN 17 D2 2.2V 16 D1 2.5k 1.95k 15 D0 9 4 10 3 5 6 1 AVDD VBIAS AGND SHDN VREF AGND OGND 1406 BD
U U W U APPLICATIONS INFORMATION Conversion Details
capacitors CH resulting in a differential DC voltage on the output of the track-and-hold amplifier that is proportional The LTC1406 uses an internal sample-and-hold circuit and to the input signal. This differential voltage is fed into a a pipeline quantizing architecture to convert an analog comparator that determines the most significant bit and signal to an 8-bit parallel output. With CLK high the input subtracts the result. The residue is then amplified by two switches are closed and the analog input will be acquired and passed to the next stage via a similar sample-and-hold on the input sampling capacitors CS (see Figure 1). circuit. This continues down the eight pipeline stages. The On the falling edge of CLK the input switches open, captur- comparator outputs are then combined in a digital error ing the input signal. The sampling capacitors are then correction circuit. The 8-bit word is available at the output, shorted together and the charge is transferred to the hold five clock cycles after the sampling edge. CLK
Dynamic Performance
CH The LTC1406 has excellent wideband sampling capability. The sample-and-hold amplifier has a small-signal input CS CLK bandwidth of 250MHz allowing the ADC to undersample A + IN + input signals with frequencies well beyond the converter’s CLK C CLK TO NEXT STAGE S CLK Nyquist frequency. FFT (Fast Fourier Transform) test tech- A – IN – niques are used to test the ADC’s frequency response, CH distortion and noise at the rated throughput. By applying a low distortion sine wave and analyzing the digital output 1406 F01 CLK using an FFT algorithm, the ADC’s spectral content can be examined for frequencies outside the fundamental. Figure
Figure 1. Input Sample-and-Hold Amplifier
2 shows a typical LTC1406 FFT plot. 7
