Datasheet LTC2182, LTC2181, LTC2180 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 16-Bit, 65Msps Low Power Dual ADCs |
| Pages / Page | 36 / 9 — TIMING DIAGRAMS. Full-Rate CMOS Output Mode Timing. All Outputs Are … |
| File Format / Size | PDF / 4.0 Mb |
| Document Language | English |
TIMING DIAGRAMS. Full-Rate CMOS Output Mode Timing. All Outputs Are Single-Ended and Have CMOS Levels
Model Line for this Datasheet
- LTC2180CUP#PBF LTC2180CUP#PBF LTC2180CUP#TRPBF LTC2180CUP#TRPBF LTC2180IUP#PBF LTC2180IUP#PBF LTC2180IUP#TRPBF LTC2180IUP#TRPBF
Text Version of Document
LTC2182/LTC2181/LTC2180
TIMING DIAGRAMS Full-Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD D1_0 - D1_15, OF1 A – 6 A – 5 A – 4 A – 3 A – 2 D2_0 - D2_15, OF2 B – 6 B – 5 B – 4 B – 3 B – 2 tC CLKOUT+ CLKOUT– 218210 TD01
Double Data Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD tD BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 D1_0_1 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 ••• BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 D1_14_15 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 D2_0_1 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 ••• BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 D2_14_15 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 OF OF OF OF OF OF OF OF OF OF2_1 B-6 A-6 B-5 A-5 B-4 A-4 B-3 A-3 B-2 tC tC CLKOUT+ CLKOUT– 218210 TD02 218210f 9 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATIONS ORDER INFORMATION CONVERTER CHARACTERISTICS ANALOG INPUT DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS DIGITAL INPUTS AND OUTPUTS POWER REQUIREMENTS TIMING CHARACTERISTICS TIMING DIAGRAMS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS FUNCTIONAL BLOCK DIAGRAM APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS
TIMING DIAGRAMS Full-Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD D1_0 - D1_15, OF1 A – 6 A – 5 A – 4 A – 3 A – 2 D2_0 - D2_15, OF2 B – 6 B – 5 B – 4 B – 3 B – 2 tC CLKOUT+ CLKOUT– 218210 TD01
Double Data Rate CMOS Output Mode Timing All Outputs Are Single-Ended and Have CMOS Levels
tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD tD BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 D1_0_1 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 ••• BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 D1_14_15 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 D2_0_1 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 ••• BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 D2_14_15 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 OF OF OF OF OF OF OF OF OF OF2_1 B-6 A-6 B-5 A-5 B-4 A-4 B-3 A-3 B-2 tC tC CLKOUT+ CLKOUT– 218210 TD02 218210f 9 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATIONS ORDER INFORMATION CONVERTER CHARACTERISTICS ANALOG INPUT DYNAMIC ACCURACY INTERNAL REFERENCE CHARACTERISTICS DIGITAL INPUTS AND OUTPUTS POWER REQUIREMENTS TIMING CHARACTERISTICS TIMING DIAGRAMS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS FUNCTIONAL BLOCK DIAGRAM APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS
