Datasheet LTC2195, LTC2194, LTC2193 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | 16-Bit, 125Msps Low Power Dual ADCs |
| Pages / Page | 28 / 6 — TIMING CHARACTERISTICS. The. denotes the specifications which apply over … |
| File Format / Size | PDF / 920 Kb |
| Document Language | English |
TIMING CHARACTERISTICS. The. denotes the specifications which apply over the full operating temperature
Model Line for this Datasheet
- LTC2193CUKG#PBF LTC2193CUKG#PBF LTC2193CUKG#TRPBF LTC2193CUKG#TRPBF LTC2193IUKG#PBF LTC2193IUKG#PBF LTC2193IUKG#TRPBF LTC2193IUKG#TRPBF
Text Version of Document
LTC2195 LTC2194/LTC2193
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) LTC2195 LTC2194 LTC2193 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
fS Sampling Frequency (Notes 10, 11) l 5 125 5 105 5 80 MHz tENCL ENC Low Time (Note 8) Duty Cycle Stabilizer Off l 3.8 4 100 4.52 4.76 100 5.93 6.25 100 ns Duty Cycle Stabilizer On l 2 4 100 2 4.76 100 2 6.25 100 ns tENCH ENC High Time (Note 8) Duty Cycle Stabilizer Off l 3.8 4 100 4.52 4.76 100 5.93 6.25 100 ns Duty Cycle Stabilizer On l 2 4 100 2 4.76 100 2 6.25 100 ns tAP Sample-and-Hold 0 0 0 ns Acquistion Delay Time
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Digital Data Outputs (RTERM = 100Ω Differential, CL = 2pF to GND On Each Output)
tSER Serial Data Bit Period 4-Lane Output Mode 1/(4 • fS) Sec 2-Lane Output Mode 1/(8 • fS) 1-Lane Output Mode 1/(16 • fS) tFRAME FR to DCO Delay (Note 8) l 0.35 • tSER 0.5 • tSER 0.65 • tSER Sec tDATA Data to DCO Delay (Note 8) l 0.35 • tSER 0.5 • tSER 0.65 • tSER Sec tPD Propagation Delay (Note 8) l 0.7n + 2 • tSER 1.1n + 2 • tSER 1.5n + 2 • tSER Sec tr Output Rise Time Data, DCO, FR, 20% to 80% 0.17 ns tf Output Fall Time Data, DCO, FR, 20% to 80% 0.17 ns DCO Cycle-Cycle Jitter tSER = 1ns 60 psP-P Pipeline Latency 7 Cycles
SPI Port Timing (Note 8)
tSCK SCK Period Write Mode l 40 ns Readback Mode, l 250 ns CSDO = 20pF, RPULLUP = 2k tS CS-to-CLK Setup Time l 5 ns tH SCK-to-CS Setup Time l 5 ns tDS SDI Setup Time l 5 ns tDH SDI Hold Time l 5 ns tDO SCK Falling to SDO Readback Mode, l 125 ns Valid CSDO = 20pF, RPULLUP = 2k
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 6:
Integral nonlinearity is defined as the deviation of a code from a may cause permanent damage to the device. Exposure to any Absolute best fit straight line to the transfer curve. The deviation is measured from Maximum Rating condition for extended periods may affect device the center of the quantization band. reliability and lifetime.
Note 7:
Offset error is the offset voltage measured from –0.5LSB when
Note 2:
All voltage values are with respect to GND with GND and OGND the output code flickers between 0000 0000 0000 0000 and 1111 1111 shorted (unless otherwise noted). 1111 1111 in 2’s complement output mode.
Note 3:
When these pin voltages are taken below GND or above VDD, they
Note 8:
Guaranteed by design, not subject to test. will be clamped by internal diodes. This product can handle input currents
Note 9:
VDD = OVDD=1.8V, fSAMPLE = 125MHz (LTC2195), of greater than 100mA below GND or above VDD without latchup. 105MHz (LTC2194), or 80MHz (LTC2193), 2-lane output mode,
Note 4:
When these pin voltages are taken below GND they will be ENC+ = single-ended 1.8V square wave, ENC– = 0V, input range = 2VP-P clamped by internal diodes. When these pin voltages are taken above VDD with differential drive, unless otherwise noted. The supply current and they will not be clamped by internal diodes. This product can handle input power dissipation specifications are totals for the entire IC, not per currents of greater than 100mA below GND without latchup. channel.
Note 5:
VDD = OVDD = 1.8V, fSAMPLE = 125MHz (LTC2195), 105MHz
Note 10:
Recommended operating conditions. (LTC2194), or 80MHz (LTC2193), 2-lane output mode, differential
Note 11:
The maximum sampling frequency depends on the speed grade ENC+/ENC– = 2VP-P sine wave, input range = 2VP-P with differential drive, of the part and also which serialization mode is used. The maximum serial unless otherwise noted. data rate is 1000Mbps, so tSER must be greater than or equal to 1ns. 219543f 6 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) LTC2195 LTC2194 LTC2193 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
fS Sampling Frequency (Notes 10, 11) l 5 125 5 105 5 80 MHz tENCL ENC Low Time (Note 8) Duty Cycle Stabilizer Off l 3.8 4 100 4.52 4.76 100 5.93 6.25 100 ns Duty Cycle Stabilizer On l 2 4 100 2 4.76 100 2 6.25 100 ns tENCH ENC High Time (Note 8) Duty Cycle Stabilizer Off l 3.8 4 100 4.52 4.76 100 5.93 6.25 100 ns Duty Cycle Stabilizer On l 2 4 100 2 4.76 100 2 6.25 100 ns tAP Sample-and-Hold 0 0 0 ns Acquistion Delay Time
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Digital Data Outputs (RTERM = 100Ω Differential, CL = 2pF to GND On Each Output)
tSER Serial Data Bit Period 4-Lane Output Mode 1/(4 • fS) Sec 2-Lane Output Mode 1/(8 • fS) 1-Lane Output Mode 1/(16 • fS) tFRAME FR to DCO Delay (Note 8) l 0.35 • tSER 0.5 • tSER 0.65 • tSER Sec tDATA Data to DCO Delay (Note 8) l 0.35 • tSER 0.5 • tSER 0.65 • tSER Sec tPD Propagation Delay (Note 8) l 0.7n + 2 • tSER 1.1n + 2 • tSER 1.5n + 2 • tSER Sec tr Output Rise Time Data, DCO, FR, 20% to 80% 0.17 ns tf Output Fall Time Data, DCO, FR, 20% to 80% 0.17 ns DCO Cycle-Cycle Jitter tSER = 1ns 60 psP-P Pipeline Latency 7 Cycles
SPI Port Timing (Note 8)
tSCK SCK Period Write Mode l 40 ns Readback Mode, l 250 ns CSDO = 20pF, RPULLUP = 2k tS CS-to-CLK Setup Time l 5 ns tH SCK-to-CS Setup Time l 5 ns tDS SDI Setup Time l 5 ns tDH SDI Hold Time l 5 ns tDO SCK Falling to SDO Readback Mode, l 125 ns Valid CSDO = 20pF, RPULLUP = 2k
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 6:
Integral nonlinearity is defined as the deviation of a code from a may cause permanent damage to the device. Exposure to any Absolute best fit straight line to the transfer curve. The deviation is measured from Maximum Rating condition for extended periods may affect device the center of the quantization band. reliability and lifetime.
Note 7:
Offset error is the offset voltage measured from –0.5LSB when
Note 2:
All voltage values are with respect to GND with GND and OGND the output code flickers between 0000 0000 0000 0000 and 1111 1111 shorted (unless otherwise noted). 1111 1111 in 2’s complement output mode.
Note 3:
When these pin voltages are taken below GND or above VDD, they
Note 8:
Guaranteed by design, not subject to test. will be clamped by internal diodes. This product can handle input currents
Note 9:
VDD = OVDD=1.8V, fSAMPLE = 125MHz (LTC2195), of greater than 100mA below GND or above VDD without latchup. 105MHz (LTC2194), or 80MHz (LTC2193), 2-lane output mode,
Note 4:
When these pin voltages are taken below GND they will be ENC+ = single-ended 1.8V square wave, ENC– = 0V, input range = 2VP-P clamped by internal diodes. When these pin voltages are taken above VDD with differential drive, unless otherwise noted. The supply current and they will not be clamped by internal diodes. This product can handle input power dissipation specifications are totals for the entire IC, not per currents of greater than 100mA below GND without latchup. channel.
Note 5:
VDD = OVDD = 1.8V, fSAMPLE = 125MHz (LTC2195), 105MHz
Note 10:
Recommended operating conditions. (LTC2194), or 80MHz (LTC2193), 2-lane output mode, differential
Note 11:
The maximum sampling frequency depends on the speed grade ENC+/ENC– = 2VP-P sine wave, input range = 2VP-P with differential drive, of the part and also which serialization mode is used. The maximum serial unless otherwise noted. data rate is 1000Mbps, so tSER must be greater than or equal to 1ns. 219543f 6 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts
