Datasheet LTC2380-24 (Analog Devices) - 10

ManufacturerAnalog Devices
Description24-Bit, 1.5Msps/2Msps, Low Power SAR ADC with Integrated Digital Filter
Pages / Page32 / 10 — FUNCTIONAL BLOCK DIAGRAM. TIMING DIAGRAM. Conversion Timing Using the …
File Format / SizePDF / 1.5 Mb
Document LanguageEnglish

FUNCTIONAL BLOCK DIAGRAM. TIMING DIAGRAM. Conversion Timing Using the Serial Interface

FUNCTIONAL BLOCK DIAGRAM TIMING DIAGRAM Conversion Timing Using the Serial Interface

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LTC2380-24
FUNCTIONAL BLOCK DIAGRAM
VDD = 2.5V REF = 5V OVDD = 1.8V to 5V CHAIN IN+ + SDO 24-BIT DIGITAL SPI RDL/SDI SAMPLING ADC FILTER PORT IN– SCK – CNV BUSY CONTROL LOGIC REF/DGC GND 238024 BD
TIMING DIAGRAM Conversion Timing Using the Serial Interface
CHAIN, RDL/SDI = 0 CNV BUSY POWER-DOWN AND ACQUIRE CONVERT SCK SDO D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 238024 TD01 DATA FROM CONVERSION NUMBER OF SAMPLES AVERAGED FOR DATA 238024fa 10 For more information www.linear.com/LTC2380-24 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Reference Input Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Revision History Typical Application Related Parts